SWRS187D August   2016  – July 2019 CC2650MODA

PRODUCTION DATA.  

  1. Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. Revision History
  3. Device Comparison
    1. 3.1 Related Products
  4. Terminal Configuration and Functions
    1. 4.1 Module Pin Diagram
    2. 4.2 Pin Functions
  5. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Power Consumption Summary
    5. 5.5  General Characteristics
    6. 5.6  Antenna
    7. 5.7  1-Mbps GFSK (Bluetooth low energy) – RX
    8. 5.8  1-Mbps GFSK (Bluetooth low energy) – TX
    9. 5.9  IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – RX
    10. 5.10 IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – TX
    11. 5.11 24-MHz Crystal Oscillator (XOSC_HF)
    12. 5.12 32.768-kHz Crystal Oscillator (XOSC_LF)
    13. 5.13 48-MHz RC Oscillator (RCOSC_HF)
    14. 5.14 32-kHz RC Oscillator (RCOSC_LF)
    15. 5.15 ADC Characteristics
    16. 5.16 Temperature Sensor
    17. 5.17 Battery Monitor
    18. 5.18 Continuous Time Comparator
    19. 5.19 Low-Power Clocked Comparator
    20. 5.20 Programmable Current Source
    21. 5.21 DC Characteristics
    22. 5.22 Thermal Resistance Characteristics for MOH Package
    23. 5.23 Timing Requirements
    24. 5.24 Switching Characteristics
    25. 5.25 Typical Characteristics
  6. Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Main CPU
    4. 6.4  RF Core
    5. 6.5  Sensor Controller
    6. 6.6  Memory
    7. 6.7  Debug
    8. 6.8  Power Management
    9. 6.9  Clock Systems
    10. 6.10 General Peripherals and Modules
    11. 6.11 System Architecture
    12. 6.12 Certification
      1. 6.12.1 Regulatory Information Europe
      2. 6.12.2 Federal Communications Commission Statement
      3. 6.12.3 Canada, Industry Canada (IC)
      4. 6.12.4 Japan (JATE ID)
    13. 6.13 End Product Labeling
    14. 6.14 Manual Information to the End User
    15. 6.15 Module Marking
  7. Application, Implementation, and Layout
    1. 7.1 Application Information
      1. 7.1.1 Typical Application Circuit
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  8. Environmental Requirements and Specifications
    1. 8.1 PCB Bending
    2. 8.2 Handling Environment
      1. 8.2.1 Terminals
      2. 8.2.2 Falling
    3. 8.3 Storage Condition
      1. 8.3.1 Moisture Barrier Bag Before Opened
      2. 8.3.2 Moisture Barrier Bag Open
    4. 8.4 Baking Conditions
    5. 8.5 Soldering and Reflow Condition
  9. Device and Documentation Support
    1. 9.1  Device Nomenclature
    2. 9.2  Tools and Software
    3. 9.3  Documentation Support
    4. 9.4  Texas Instruments Low-Power RF Website
    5. 9.5  Low-Power RF eNewsletter
    6. 9.6  Community Resources
    7. 9.7  Additional Information
    8. 9.8  Trademarks
    9. 9.9  Electrostatic Discharge Caution
    10. 9.10 Export Control Notice
    11. 9.11 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Packaging Information
    2. 10.2 PACKAGE OPTION ADDENDUM
      1. 10.2.1 PACKAGING INFORMATION
    3. 10.3 PACKAGE MATERIALS INFORMATION
      1. 10.3.1 TAPE AND REEL INFORMATION

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • MOH|29
Thermal pad, mechanical data (Package|Pins)
Orderable Information

General Peripherals and Modules

The I/O controller controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a programmable pullup and pulldown function and can generate an interrupt on a negative or positive edge (configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs have high-drive capabilities (marked in bold in Section 4).

The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and TI's synchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz.

The UART implements a universal asynchronous receiver/transmitter function. It supports flexible baud-rate generation up to a maximum of 3 Mbps.

Timer 0 is a general-purpose timer module (GPTM), which provides two 16-bit timers. The GPTM can be configured to operate as a single 32-bit timer, dual 16-bit timers or as a PWM module.

Timer 1, Timer 2, and Timer 3 are also GPTMs. Each of these timers is functionally equivalent to Timer 0.

In addition to these four timers, the RF core has its own timer to handle timing for RF protocols; the RF timer can be synchronized to the RTC.

The I2C interface is used to communicate with devices compatible with the I2C standard. The I2C interface is capable of 100-kHz and 400-kHz operation, and can serve as both I2C master and I2C slave.

The TRNG module provides a true, nondeterministic noise source for the purpose of generating keys, initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring oscillators that create unpredictable output to feed a complex nonlinear combinatorial circuit.

The watchdog timer is used to regain control if the system fails due to a software error after an external device fails to respond as expected. The watchdog timer can generate an interrupt or a reset when a predefined time-out value is reached.

The device includes a direct memory access (µDMA) controller. The µDMA controller provides a way to offload data transfer tasks from the Cortex-M3 CPU, allowing for more efficient use of the processor and the available bus bandwidth. The µDMA controller can perform transfer between memory and peripherals. The µDMA controller has dedicated channels for each supported on-chip module and can be programmed to automatically perform transfers between peripherals and memory as the peripheral is ready to transfer more data. Some features of the µDMA controller include the following (this is not an exhaustive list):

  • Highly flexible and configurable channel operation of up to 32 channels
  • Transfer modes: memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-peripheral
  • Data sizes of 8, 16, and 32 bits

The AON domain contains circuitry that is always enabled, except in Shutdown mode (where the digital supply is off). This circuitry includes the following:

  • The RTC can be used to wake the device from any state where it is active. The RTC contains three compare and one capture registers. With software support, the RTC can be used for clock and calendar operation. The RTC is clocked from the 32-kHz RC oscillator or crystal. The RTC can also be compensated to tick at the correct frequency even when the internal 32-kHz RC oscillator is used instead of a crystal.
  • The battery monitor and temperature sensor are accessible by software and give a battery status indication as well as a coarse temperature measure.