SCAS918D June   2013  – February 2024 CDCE913-Q1 , CDCEL913-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Control Terminal Configuration
      2. 8.3.2 Default Device Configuration
      3. 8.3.3 I2C Serial Interface
      4. 8.3.4 Data Protocol
    4. 8.4 Device Functional Modes
      1. 8.4.1 SDA and SCL Hardware Interface
    5. 8.5 Programming
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Spread-Spectrum Clock (SSC)
        2. 9.2.2.2 PLL Frequency Planning
        3. 9.2.2.3 Crystal Oscillator Start-Up
        4. 9.2.2.4 Frequency Adjustment With Crystal Oscillator Pulling
        5. 9.2.2.5 Unused Inputs and Outputs
        6. 9.2.2.6 Switching Between XO and VCXO Mode
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Register Maps
    1. 10.1 I2C Configuration Registers
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-093413F2-7037-459F-A644-8A29C3A87B72-low.svg Figure 5-1 PW Package14-Pin TSSOPTop View
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
GND 5, 10 G Ground
SCL/S2 12 I SCL: serial clock input LVCMOS (default configuration), 500-kΩ internal pullup; or
S2: user-programmable control input, LVCMOS input, 500-kΩ internal pullup
SDA/S1 13 I/O or I SDA: bidirectional serial data input/output (default configuration), LVCMOS internal pullup; or
S1: user-programmable control input, LVCMOS input, 500-kΩ internal pullup
S0 2 I User-programmable control input S0, LVCMOS input, 500-kΩ internal pullup
Vctr 4 I VCXO control voltage (leave open or pull up when not used)
VDD 3 P 1.8-V power supply for the device
VDDOUT 6, 7 P CDCE913-Q1: 3.3-V or 2.5-V supply for all outputs
CDCEL913-Q1: 1.8-V supply for all outputs
Xin/CLK 1 I Crystal oscillator input or LVCMOS clock input (selectable through the I2C bus)
Xout 14 O Crystal oscillator output (leave open or pull up when not used)
Y1 11 O LVCMOS output
Y2 9 O LVCMOS output
Y3 8 O LVCMOS output
(1) G = Ground, I = Input, O = Output, P = Power