SLOS690C December   2010  – July 2016 DRV612

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Electrical Characteristics, Line Driver
    7. 7.7 Programmable Gain Settings
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Line Driver Amplifiers
    4. 9.4 Device Functional Modes
      1. 9.4.1 Internal Undervoltage Detection
      2. 9.4.2 Pop-Free Power Up
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Capacitive Load
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Component Selection
          1. 10.2.2.1.1 Charge Pump Flying Capacitor and VSS Capacitor
          2. 10.2.2.1.2 Decoupling Capacitors
          3. 10.2.2.1.3 Gain-Setting
          4. 10.2.2.1.4 Input-Blocking Capacitors
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Footprint Compatible With TPA6139A2
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Detailed Description

9.1 Overview

The DRV612 is a DirectPath stereo line driver that requires no output DC-blocking capacitors and is capable of delivering 2 Vrms into a 600-Ω load. The device has built-in pop suppression circuitry to completely eliminate pop noise during turn-on and turn-off. The amplifier outputs have short-circuit protection.

The DRV612 gain is controlled by an external resistors RGAIN, see Gain-Setting for recommended values.

The DRV612 operates from a single 3-V to 3.6-V supply, as it uses a built-in charge pump to generate a negative voltage supply for the line driver.

9.2 Functional Block Diagram

DRV612 fbd_los690.gif

9.3 Feature Description

9.3.1 Line Driver Amplifiers

Single-supply line driver amplifiers typically require DC-blocking capacitors. The top drawing in Figure 8 illustrates the conventional line driver amplifier connection to the load and output signal.

DC blocking capacitors are often large in value, and a mute circuit is needed during power up to minimize click and pop. The output capacitor and mute circuit consume PCB area and increase cost of assembly, and can reduce the fidelity of the audio output signal.

DRV612 dp_line_dvr_los690.gif Figure 8. Conventional and DirectPath Line Driver

The DirectPath amplifier architecture operates from a single supply but makes use of an internal charge pump to provide a negative voltage rail.

Combining the user-provided positive rail and the negative rail generated by the IC, the device operates in what is effectively a split supply mode.

The output voltages are now centered at zero volts with the capability to swing to the positive rail or negative rail. Combining this with the built-in click- and pop-reduction circuit, the DirectPath amplifier requires no output dc-blocking capacitors.

The bottom block diagram and waveform of Figure 8 illustrate the ground-referenced line-driver architecture. This is the architecture of the DRV612.

9.4 Device Functional Modes

9.4.1 Internal Undervoltage Detection

The DRV612 contains an internal precision band-gap reference voltage and a comparator used to monitor the supply voltage, VDD. The internal VDD monitor is set at 2.8 V with 200-mV hysteresis.

DRV612 vol_det_los690.gif Figure 9. UVP Internal Comparator

9.4.2 Pop-Free Power Up

Pop-free power up is ensured by keeping the MUTE pin low during power-supply ramp-up and ramp-down. The pins should be kept low until the input ac-coupling capacitors are fully charged before asserting the MUTE pin high, this way proper pre-charge of the ac-coupling is performed and pop-less power up is achieved. Figure 10 illustrates the preferred sequence.

DRV612 pwr_up_los690.gif Figure 10. Power-Up and Power-Down Sequence