7.6.2.5 CSIPASS Register (Address = 16h) [reset = 2h]
CSIPASS is described in Table 111.
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Table 111. CSIPASS Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7-3 |
RESERVED |
R/W |
0h |
Reserved |
2 |
CSI_PASS_toGP3 |
R/W |
0h |
CSI_PASS to GPIO3. Configures GPIO3 to output the PASS signal when this bit is set HIGH. |
1 |
CSI_PASS_toGP0 |
R/W |
1h |
CSI_PASS to GPIO0. Configures GPIO0 to output the PASS signal when this bit is set HIGH. This is the default. |
0 |
CSI_PASS |
R/W |
0h |
CSI_PASS. This bit reflects the status of the PASS signal. |