SBOS014A September   2000  – January 2024 INA114

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Setting the Gain
      2. 6.1.2 Noise Performance
      3. 6.1.3 Offset Trimming
      4. 6.1.4 Input Bias Current Return Path
      5. 6.1.5 Input Common-Mode Range
      6. 6.1.6 Input Protection
      7. 6.1.7 Output Voltage Sense (SOIC-16 Package Only)
  8. 7 Typical Applications
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • P|8
  • DW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.1.6 Input Protection

The inputs of the INA114 are individually protected for voltages up to ±40V. For example, a condition of –40V on one input and +40V on the other input does not cause damage. Internal circuitry on each input provides low series impedance under normal signal conditions. To provide equivalent protection, series input resistors contribute excessive noise. If the input is overloaded, the protection circuitry limits the input current to a safe value (approximately 1.5mA). Typical performance curve Input Bias Current vs Common-Mode Input Voltage shows this input current limit behavior. The inputs are protected even if no power supply voltage is present.