SLLSEU3E november   2016  – august 2023 ISO7730-Q1 , ISO7731-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics—5-V Supply
    10. 6.10 Supply Current Characteristics—5-V Supply
    11. 6.11 Electrical Characteristics—3.3-V Supply
    12. 6.12 Supply Current Characteristics—3.3-V Supply
    13. 6.13 Electrical Characteristics—2.5-V Supply
    14. 6.14 Supply Current Characteristics—2.5-V Supply
    15. 6.15 Switching Characteristics—5-V Supply
    16. 6.16 Switching Characteristics—3.3-V Supply
    17. 6.17 Switching Characteristics—2.5-V Supply
    18. 6.18 Insulation Characteristics Curves
    19. 6.19 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Electromagnetic Compatibility (EMC) Considerations
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
        1. 9.2.3.1 Insulation Lifetime
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBQ|16
  • DW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Insulation Specifications

PARAMETERTEST CONDITIONSSPECIFICATIONUNIT
DW-16DBQ-16
CLRExternal clearance (1)Shortest terminal-to-terminal distance through air>8>3.7mm
CPGExternal creepage (1)Shortest terminal-to-terminal distance across the package surface>8>3.7mm
DTIDistance through the insulationMinimum internal gap (internal clearance)>21>21μm
CTIComparative tracking indexDIN EN 60112 (VDE 0303-11); IEC 60112; UL 746A>600>600V
Material groupAccording to IEC 60664-1II
Overvoltage category per IEC 60664-1Rated mains voltage ≤ 150 VRMSI–IVI–IV
Rated mains voltage ≤ 300 VRMSI–IVI–III
Rated mains voltage ≤ 600 VRMSI–IVn/a
Rated mains voltage ≤ 1000 VRMSI–IIIn/a
DIN VDE V 0884-11:2017-01(2)
VIORMMaximum repetitive peak isolation voltageAC voltage (bipolar)2121566VPK
VIOWMMaximum working isolation voltageAC voltage; Time dependent dielectric breakdown (TDDB) Test; See Figure 9-81500400VRMS
DC Voltage2121566VDC
VIOTMMaximum transient isolation voltageVTEST = VIOTM,
t = 60 s (qualification);
VTEST = 1.2 × VIOTM,
t = 1 s (100% production)		80004242VPK
VIOSMMaximum surge isolation voltage (3)Test method per IEC 62368-1; 1.2/50 µs waveform,
VTEST = 1.6 × VIOSM (qualification)		80004000VPK
qpdApparent charge(4)Method a, After Input/Output safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM, tm = 10 s		≤5≤5pC
Method a, After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s; Vpd(m) = 1.6 × VIORM, tm = 10 s		≤5≤5
Method b1; At routine test (100% production) and preconditioning (type test)
Vini = 1.2 × VIOTM, tini = 1 s;
Vpd(m) = 1.875 × VIORM, tm = 1 s		≤5≤5
CIOBarrier capacitance, input to output(5)VIO = 0.4 x sin (2πft), f = 1 MHz~0.7~0.7pF
RIOIsolation resistance(5)VIO = 500 V, TA = 25°C>1012>1012Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C>1011>1011
VIO = 500 V at TS = 150°C>109>109
Pollution degree22
Climatic category55/125/2155/125/21
UL 1577
VISOWithstanding isolation voltageVTEST = VISO , t = 60 s (qualificati
on), VTEST = 1.2 × VISO , t = 1 s (100% production)		50003000VRMS
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
(2) This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
(4) Apparent charge is electrical discharge caused by a partial discharge (pd).
(5) All pins on each side of the barrier tied together creating a two-terminal device.