SLLSF40B November   2017  – September 2019 ISOW7821

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Schematic
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics—5-V Input, 5-V Output
    10. 7.10 Supply Current Characteristics—5-V Input, 5-V Output
    11. 7.11 Electrical Characteristics—5-V Input, 3.3-V Output
    12. 7.12 Supply Current Characteristics—5-V Input, 3.3-V Output
    13. 7.13 Electrical Characteristics—3.3-V Input, 3.3-V Output
    14. 7.14 Supply Current Characteristics—3.3-V Input, 3.3-V Output
    15. 7.15 Switching Characteristics—5-V Input, 5-V Output
    16. 7.16 Switching Characteristics—5-V Input, 3.3-V Output
    17. 7.17 Switching Characteristics—3.3-V Input, 3.3-V Output
    18. 7.18 Insulation Characteristics Curves
    19. 7.19 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Current Limit, Thermal Overload Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
        1. 10.2.3.1 Insulation Lifetime
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Description (continued)

The ISOW7821 device provides high electromagnetic immunity and low emissions while isolating CMOS or LVCMOS digital I/Os. The signal-isolation channel has a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier, whereas, power isolation uses on-chip transformers separated by thin film polymer as insulating material. Various configurations of forward and reverse channels are available. If the input signal is lost, the default output is high for the ISOW7821 device and low for the device with the F suffix (see the Device Features).

These devices help prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through innovative chip design and layout techniques, electromagnetic compatibility of the ISOW7821 device has been significantly enhanced to ease system-level ESD, EFT, surge and emissions compliance. The high-efficiency of the power converter allows operation at a higher ambient temperature. The ISOW7821 device is available in a 16-pin SOIC wide-body (SOIC-WB) DWE package.