SNVS859C July 2012 – September 2016 LM25101
The total IC power dissipation is the sum of the gate driver losses and the bootstrap diode losses. The gate driver losses are related to the switching frequency (f), output load capacitance on LO and HO (CL), and supply voltage (VDD), which can be roughly calculated using Equation 5.
There are some additional losses in the gate drivers due to the internal CMOS stages used to buffer the LO and HO outputs. Figure 24 shows the measured gate driver power dissipation versus frequency and load capacitance. At higher frequencies and load capacitance values, the power dissipation is dominated by the power losses driving the output loads and agrees well with Equation 5. Figure 24 can be used to approximate the power losses due to the gate drivers.
The bootstrap diode power loss is the sum of the forward bias power loss that occurs while charging the bootstrap capacitor and the reverse bias power loss that occurs during reverse recovery. Since each of these events happens once per cycle, the diode power loss is proportional to frequency. Larger capacitive loads require more energy to recharge the bootstrap capacitor resulting in more losses. Higher input voltages (VIN) to the half bridge result in higher reverse recovery losses. Figure 25 was generated based on calculations and lab measurements of the diode recovery time and current under several operating conditions and can be used to approximate the diode power dissipation.
The total IC power dissipation can be estimated from these plots by summing the gate drive losses with the bootstrap diode losses for the intended application.
|VDD = 12 V||Neglecting Diode Losses|
|VIN = 50 V|