SNVS255B May   2004  – September 2016 LM5110

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage and Level Shifter
      2. 8.3.2 Output Stage
      3. 8.3.3 Turn-off with Negative Bias
      4. 8.3.4 UVLO and Power Supplies
      5. 8.3.5 Shutdown SHDN
    4. 8.4 Device Functional Modes
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Parallel Outputs
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
      1. 11.3.1 Drive Power Requirement Calculations in LM5110
      2. 11.3.2 Continuous Current Rating of LM5110
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
VCC to VEE  −0.3 15 V
VCC to IN_REF −0.3 15 V
IN to IN_REF, nSHDN to IN_REF −0.3 15 V
IN_REF to VEE −0.3 5 V
Maximum junction temperature,
 (TJ(max))		 150 °C
Operating junction temperature 125 °C
Storage temperature, (Tstg) –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC to VEE 3.5 - 14 V
VCC to IN_REF 3.5 - 14 V
IN_REF to VEE 0 4 V
Junction Temperature -40 126 °C

7.4 Thermal Information

THERMAL METRIC(1) LM5110 UNIT
D (SOIC) DPR (WSON)
8 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 114 40.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 56.6 40.4 °C/W
RθJB Junction-to-board thermal resistance 55.2 17.3 °C/W
ψJT Junction-to-top characterization parameter 10.3 0.5 °C/W
ψJB Junction-to-board characterization parameter 54.6 17.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance - 6.3 °C/W
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics

TJ = −40°C to +125°C, VCC = 12V, VEE = IN_REF = 0V, nSHDN = VCC, No Load on OUT_A or OUT_B, unless otherwise specified.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCC Operating Range VCC−IN_REF and VCC−VEE 3.5 14 V
VCCR VCC Under Voltage Lockout (rising) VCC−IN_REF 2.3 2.9 3.5 V
VCCH VCC Under Voltage Lockout Hysteresis 230 mV
ICC VCC Supply Current (ICC) IN_A = IN_B = 0 V (5110-1) 1 2 mA
IN_A = IN_B = VCC (5110-2) 1 2
IN_A = VCC, IN_B = 0 V (5110-3) 1 2
ICCSD VCC Shutdown Current (ICC) nSHDN = 0 V 18 25 µA
CONTROL INPUTS
VIH Logic High 2.2 V
VIL Logic Low 0.8 V
HYS Input Hysteresis 400 mV
IIL Input Current Low IN_A=IN_B=VCC (5110-1-2-3) −1 0.1 1 µA
IIH Input Current High IN_A=IN_B=VCC (5110-1) 10 18 25
IN_A=IN_B=VCC (5110-2) −1 0.1 1
IN_A=VCC (5110-3) –1 0.1 1
IN_B=VCC (5110-3) 10 18 25
SHUTDOWN INPUT
ISD Pullup Current nSHDN = 0 V −18 −25 µA
VSDR Shutdown Threshold nSHDN rising 0.8 1.5 2.2 V
VSDH Shutdown Hysteresis 165 mV
OUTPUT DRIVERS
ROH Output Resistance High IOUT = −10 mA (1) 30 50 Ω
ROL Output Resistance Low IOUT = + 10 mA (1) 1.4 2.5 Ω
ISource Peak Source Current OUTA/OUTB = VCC/2,
200 ns Pulsed Current		 3 A
ISink Peak Sink Current OUTA/OUTB = VCC/2,
200 ns Pulsed Current		 5 A
LATCHUP PROTECTION
AEC - Q100, Method 004 TJ = 150°C 500 mA
(1) The output resistance specification applies to the MOS device only. The total output current capability is the sum of the MOS and Bipolar devices.

7.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
td1 Propagation Delay Time Low to High, IN rising (IN to OUT) CLOAD = 2 nF, see Figure 2 25 40 ns
td2 Propagation Delay Time High to Low, IN falling (IN to OUT) CLOAD = 2 nF, see Figure 2 25 40 ns
tr Rise Time CLOAD = 2 nF, see Figure 2 14 25 ns
tf Fall Time CLOAD = 2 nF, see Figure 2 12 25 ns
LM5110 20079205.gif
(a)
Figure 1. Inverting
LM5110 20079206.gif
(b)
Figure 2. Noninverting

7.7 Typical Characteristics

LM5110 20079210.gif
Figure 3. Supply Current vs Frequency
LM5110 20079212.gif
Figure 5. Rise and Fall Time vs Supply Voltage
LM5110 20079214.gif
Figure 7. Rise and Fall Time vs Capacitive Load
LM5110 20079216.gif
Figure 9. Delay Time vs Temperature
LM5110 20079218.gif
Figure 11. UVLO Thresholds and Hysteresis vs Temperature
LM5110 20079211.gif
Figure 4. Supply Current vs Load
LM5110 20079213.gif
Figure 6. Rise and Fall Time vs Temperature
LM5110 20079215.gif
Figure 8. Delay Time vs Supply Voltage
LM5110 20079217.gif
Figure 10. RDSON vs Supply Voltage