SNOS750A August   1999  – October 2014 LM7121

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Pin Configuration and Functions
  6. 6Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Handling Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  ±15V DC Electrical Characteristics
    6. 6.6  ±15V AC Electrical Characteristics
    7. 6.7  ±5V DC Electrical Characteristics
    8. 6.8  ±5V AC Electrical Characteristics
    9. 6.9  +5V DC Electrical Characteristics
    10. 6.10 +5V AC Electrical Characteristics
    11. 6.11 Typical Characteristics
  7. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Current Boost Circuit
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Color Video on Twisted Pairs Using Single Supply
      3. 7.2.3 Application Performance Plots
  8. 8Device and Documentation Support
    1. 8.1 Trademarks
    2. 8.2 Electrostatic Discharge Caution
    3. 8.3 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Differential Input Voltage (2) ±2 V
Voltage at Input/Output Pins (V+)−1.4,
(V−)+1.4 		V
Supply Voltage (V+–V−) 36 V
Output Short Circuit to Ground (3) Continuous
Lead Temperature (soldering, 10 sec) 260 °C
Junction Temperature(4) 150 ˚C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C.
(3) The maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)–TA)/RθJA. All numbers apply for packages soldered directly into a PC board.
(4) Typical Values represent the most likely parametric norm.
(5) All limits are ensured by testing or statistical analysis.
(6) Slew rate is the average of the rising and falling slew rates.
(7) Unity gain operation for ±5 V and ±15 V supplies is with a feedback network of 510 Ω and 3 pF in parallel (see Application and Implementation). For +5V single supply operation, feedback is a direct short from the output to the inverting input.
(8) AV = +2 operation with 2 kΩ resistors and 2 pF capacitor from summing node to ground.

6.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range −65 +150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) 2000 V
(1) JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process. Human body model, 1.5 k in series with 100 pF.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Operating Temperature Range -40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) D0008A (8) DBV (5) UNIT
RθJA Junction-to-ambient thermal resistance 165 325 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 ±15V DC Electrical Characteristics

Unless otherwise specified, all limits ensured for V+ = +15V, V− = −15V, VCM = VO = 0 V and RL > 1 MΩ. Boldface limits apply at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(4) LM7121I
LIMIT(5)		 UNIT
VOS Input Offset Voltage 0.9 8
15		 mV
max
IB Input Bias Current 5.2 9.5
12		 µA
max
IOS Input Offset Current 0.04 4.3
7		 µA
max
RIN Input Resistance Common Mode 10 MΩ
Differential Mode 3.4 MΩ
CIN Input Capacitance Common Mode 2.3 pF
CMRR Common Mode Rejection Ratio −10V ≤ VCM ≤ 10V
 93
 73
70		 dB
min
+PSRR Positive Power Supply Rejection Ratio 10V ≤ V+ ≤ 15 V 86
 70
68		 dB
min
−PSRR Negative Power Supply Rejection Ratio −15V ≤ V− ≤ −10V 81
 68
65		 dB
min
VCM Input Common-Mode Voltage Range CMRR ≥ 70 dB 13 11 V min
−13 −11 V max
AV Large Signal Voltage Gain RL = 2 kΩ , VO = 20 VPP 72
 65
57		 dB
min
VO Output Swing RL = 2 kΩ 13.4
 11.1
10.8		 V
min
−13.4
 −11.2
−11.0		 V
max
RL = 150 Ω 10.2
 7.75
7.0		 V
min
−7.0
 −5.0
−4.8		 V
max
ISC Output Short Circuit Current Sourcing 71
 54
44		 mA
min
Sinking 52
 39
34		 mA
min
IS Supply Current 5.3
 6.6
7.5		 mA
max

6.6 ±15V AC Electrical Characteristics

Unless otherwise specified, all limits ensured for V+ = 15V, V− = −15V, VCM = VO = 0 V and RL > 1 MΩ. Boldface limits apply at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(4) LM7121I
LIMIT(5)		 UNIT
SR Slew Rate(6) AV = +2, RL = 1 kΩ, VO = 20 VPP 1300 V/µs
GBW Unity Gain-Bandwidth RL = 1 kΩ 175 MHz
Øm Phase Margin 63 Deg
f (−3 dB) Bandwidth(7)(8) RL = 100 Ω, AV = +1 235 MHz
RL = 100 Ω, AV = +2 50
ts Settling Time 10 VPP Step, to 0.1%, RL = 500 Ω 74 ns
tr, tf Rise and Fall Time(8) AV = +2, RL = 100 Ω, VO = 0.4 VPP 5.3 ns
AD Differential Gain AV = +2, RL = 150 Ω 0.3%
ØD Differential Phase AV = +2, RL = 150 Ω 0.65 Deg
en Input-Referred Voltage Noise f = 10 kHz 17 nV / √HZ
in Input-Referred Current Noise f = 10 kHz 1.9 pA / √HZ
T.H.D. Total Harmonic Distortion 2 VPP Output, RL = 150 Ω,
AV = +2, f = 1 MHz		 0.065%
2 VPP Output, RL = 150 Ω,
AV = +2, f = 5 MHz		 0.52%

6.7 ±5V DC Electrical Characteristics

Unless otherwise specified, all limits ensured for V+ = 5V, V− = −5V, VCM = VO = 0 V and RL > 1 MΩ. Boldface limits apply at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(4) LM7121I
LIMIT(5)		 UNIT
VOS Input Offset Voltage 1.6
 8
15		 mV
max
IB Input Bias Current 5.5
 9.5
12		 µA
max
IOS Input Offset Current 0.07
 4.3
7.0		 µA
max
RIN Input Resistance Common Mode 6.8 MΩ
Differential Mode 3.4 MΩ
CIN Input Capacitance Common Mode 2.3 pF
CMRR Common Mode Rejection Ratio −2V ≤ VCM ≤ 2V 75
 65
60		 dB
min
+PSRR Positive Power Supply Rejection Ratio 3V ≤ V+ ≤ 5V 89
 65
60		 dB
min
−PSRR Negative Power Supply Rejection Ratio −5V ≤ V− ≤ −3V 78
 65
60		 dB
min
VCM Input Common Mode Voltage Range CMRR ≥ 60 dB 3
 2.5
 V
min
−3
 −2.5
 V
max
AV Large Signal Voltage Gain RL = 2 kΩ, VO = 3 VPP 66
 60
58		 dB
min
VO Output Swing RL = 2 kΩ 3.62
 3.0
2.75		 V
min
−3.62
 −3.0
−2.70		 V
max
RL = 150 Ω 3.1
 2.5
2.3		 V
min
−2.8
 −2.15
−2.00		 V
max
ISC Output Short Circuit Current Sourcing 53
 38
33		 mA
min
Sinking 29
 21
19		 mA
min
IS Supply Current 5.1
 6.4
7.2		 mA
max

6.8 ±5V AC Electrical Characteristics

Unless otherwise specified, all limits ensured for V+ = 5V, V− = −5V, VCM = VO = 0 V and RL > 1 MΩ. Boldface limits apply at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(4) LM7121I
LIMIT(5)		 UNIT
SR Slew Rate(6) AV = +2, RL = 1 kΩ, VO = 6 VPP 520 V/µs
GBW Unity Gain-Bandwidth RL = 1 kΩ 105 MHz
Øm Phase Margin RL = 1 kΩ 74 Deg
f (−3 dB) Bandwidth(7)(8) RL = 100 Ω, AV = +1 160 MHz
RL = 100 Ω, AV = +2 50 MHz
ts Settling Time 5 VPP Step, to 0.1%, RL = 500 Ω 65 ns
tr, tf Rise and Fall Time(8) AV = +2, RL = 100 Ω, VO = 0.4 VPP 5.8 ns
AD Differential Gain AV = +2, RL = 150 Ω 0.3%
ØD Differential Phase AV = +2, RL = 150 Ω 0.65 Deg
en Input-Referred Voltage Noise f = 10 kHz 17 nV / √Hz
in Input-Referred Current Noise f = 10 kHz 2 pA / √Hz
T.H.D. Total Harmonic Distortion 2 VPP Output, RL = 150 Ω,
AV = +2, f = 1 MHz		 0.1%
2 VPP Output, RL = 150 Ω,
AV = +2, f = 5 MHz		 0.6

6.9 +5V DC Electrical Characteristics

Unless otherwise specified, all limits ensured for V+ = +5V, V− = 0 V, VCM = VO = V+/2 and RL > 1 MΩ. Boldface limits apply at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(4) LM7121I
LIMIT(5)		 UNIT
VOS Input Offset Voltage 2.4 mV
IB Input Bias Current 4 µA
IOS Input Offset Current 0.04 µA
RIN Input Resistance Common Mode 2.6 M
Differential Mode 3.4 M
CIN Input Capacitance Common Mode 2.3 pF
CMRR Common Mode Rejection Ratio 2V ≤ VCM ≤ 3V 65 dB
+PSRR Positive Power Supply Rejection Ratio 4.6V ≤ V+ ≤ 5V 85 dB
−PSRR Negative Power Supply Rejection Ratio 0V ≤ V− ≤ 0.4V 61 dB
VCM Input Common-Mode Voltage Range CMRR 45 dB 3.5 V min
1.5 V max
AV Large Signal Voltage Gain RL = 2 kΩ to V+/2 64 dB
VO Output Swing RL = 2 kΩ to V+/2, High 3.7 V
RL = 2 kΩ to V+/2, Low 1.3
RL = 150 Ω to V+/2, High 3.48
RL = 150 Ω to V+/2, Low 1.59
ISC Output Short Circuit Current Sourcing 33 mA
Sinking 20 mA
IS Supply Current 4.8 mA

6.10 +5V AC Electrical Characteristics

Unless otherwise specified, all limits ensured for V+ = +5V, V− = 0 V, VCM = VO = V+/2 and RL > 1 MΩ. Boldface limits apply at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(4) LM7121I
LIMIT(5)		 UNIT
SR Slew Rate(6) AV = +2, RL = 1 kΩ to V+/2,
VO = 1.8 VPP		 145 V/µs
GBW Unity Gain-Bandwidth RL = 1k to V+/2 80 MHz
Øm Phase Margin RL = 1k to V+/2 70 Deg
f (−3 dB) Bandwidth(7)(8) RL = 100 Ω to V+/2, AV = +1 200 MHz
RL = 100 Ω to V+/2, AV = +2 45
tr, tf Rise and Fall Time(8) AV = +2, RL = 100 Ω , VO = 0.2 VPP 8 ns
T.H.D. Total Harmonic Distortion 0.6 VPP Output, RL = 150 Ω,
AV = +2, f = 1 MHz		 0.067%
0.6 VPP Output, RL = 150 Ω,
AV = +2, f = 5 MHz		 0.33%

6.11 Typical Characteristics

DS_66_supply_current_vs_supply_voltage.png
Figure 1. Supply Current vs. Supply Voltage
DS_68_input_offset_voltage_vs_temp.png
Figure 3. Input Offset Voltage vs. Temperature
DS_76.png
Figure 5. Input Offset Voltage vs. Common Mode Voltage
at VS = ±15 V
DS_78.png
Figure 7. Short Circuit Current vs. Temperature (Sourcing)
DS_70.png
Figure 9. Output Voltage vs Output Current
(ISINK, VS = ±15 V)
DS_72.png
Figure 11. Output Voltage vs Output Current
(ISOURCE, VS = ±5 V)
DS_74.png
Figure 13. Output Voltage vs. Output Current
(ISOURCE, VS = +5 V)
DS_03.png
Figure 15. CMRR vs. Frequency
DS_05.png
Figure 17. PSRR vs. Frequency
DS_89.png
Figure 19. Open Loop Frequency Response
DS_24.png
Figure 21. Unity Gain Frequency vs. Supply Voltage
DS_96.png
Figure 23. Large Signal Voltage Gain vs. Load, VS = ±15 V
DS_27.png
Figure 25. Input Voltage Noise vs. Frequency
DS_29.png
Figure 27. Input Voltage Noise vs. Frequency
DS_31.png
Figure 29. Slew Rate vs. Supply Voltage
DS_33.png
Figure 31. Slew Rate vs. Input Voltage
DS_35.png
Figure 33. Large Signal Pulse Response,
AV = -1 VS = ±15 V
DS_37.png
Figure 35. Large Signal Pulse Response,
AV = -1, VS = +5 V
DS_39.png
Figure 37. Large Signal Pulse Response,
AV = +1, VS = ±5 V
DS_41.png
Figure 39. Large Signal Pulse Response,
AV = +2, VS = ±15 V
DS_43.png
Figure 41. Large Signal Pulse Response,
AV = +2, VS = +5 V
DS_45.png
Figure 43. Small Signal Pulse Response,
AV = - 1, VS = ±5 V, RL= 100 Ω
DS_47.png
Figure 45. Small Signal Pulse Response,
A V = +1, VS = ±15 V, RL = 100 Ω
DS_49.png
Figure 47. Small Signal Pulse Response,
AV = +1, VS = +5 V, RL = 100 Ω
DS_51.png
Figure 49. Small Signal Pulse Response,
AV = +2, VS = ±5 V, RL = 100 Ω
DS_53.png
Figure 51. Closed Loop Frequency Response vs. Temperature,
VS = ±15 V, AV = +1, RL = 100 Ω
DS_55.png
Figure 53. Closed Loop Frequency Response
vs. Temperature,
VS = +5 V, AV = +1, RL= 100 Ω
DS_59.png
Figure 55. Closed Loop Frequncy Response
vs. Temperature,
VS = ±5 V, AV = +2 , RL = 100 Ω
DS_61.png
Figure 57. Closed Loop Frequency Response
vs. Capacitance Load
(AV = +1, VS = ±15 V)
DS_63_v2.png
Figure 59. Closed Loop Frequency Response
vs. Capacitive Load
(AV = +2, VS = ±15 V)
DS_80.png
Figure 61. Total Harmonic Distortion vs. Frequency
DS_83.png
Figure 63. Total Harmonic Distortion vs. Frequency
DS_85.png
Figure 65. Undistorted Output Swing vs. Frequency
DS_86.png
Figure 67. Undistorted Output Swing vs. Frequency
DS_67_supply_current_vs_temp.png
Figure 2. Supply Current vs. Temperature
DS_69.png
Figure 4. Input Bias Current vs Temperature
DS_77.png
Figure 6. Input Offset Voltage vs. Common Mode Voltage
at VS = ±5 V
DS_79.png
Figure 8. Short Circuit Current vs Temperature (Sinking)
DS_71.png
Figure 10. Output Voltage vs Output Current
(ISOURCE, VS = ±15 V)
DS_73.png
Figure 12. Output Voltage vs Output Current
(ISINK, VS = ±5 V)
DS_75.png
Figure 14. Output Voltage vs Output Current
(ISINK, VS = +5 V)
DS_04.png
Figure 16. PSRR vs. Frequency
DS_88.png
Figure 18. Open Loop Frequency Response
DS_90.png
Figure 20. Open Loop Frequency Response
DS_25.png
Figure 22. GBWP at 10 MHz vs. Supply Voltage
DS_97.png
Figure 24. Large Signal Voltage Gain vs. Load, VS = ±5 V
DS_28.png
Figure 26. Input Current Noise vs. Frequency
DS_30.png
Figure 28. Input Current Noise vs. Frequency
DS_32.png
Figure 30. Slew Rate vs. Input Voltage
DS_34.png
Figure 32. Slew Rate vs. Load Capacitance
DS_36.png
Figure 34. Large Signal Pulse Response,
AV = -1, VS = ±5V
DS_38.png
Figure 36. Large Signal Pulse Response,
AV = +1, VS = ±15 V
DS_40.png
Figure 38. Large Signal Pulse Response,
AV = +1, VS = +5 V
DS_42.png
Figure 40. Large Signal Pulse Response,
AV= +2, VS = ±5 V
DS_44.png
Figure 42. Small Signal Pulse Response,
AV = -1, VS = ±15 V, RL = 100 Ω
DS_46.png
Figure 44. Small Signal Pulse Response,
AV = -1, VS = +5 V, RL = 100 Ω
DS_48.png
Figure 46. Small Signal Pulse Response,
A V = +1, V S = ±5 V, RL = 100 Ω
DS_50.png
Figure 48. Small Signal Pulse Response,
AV = +2, VS = ±15 V, RL = 100 Ω
DS_52.png
Figure 50. Small Signal Pulse Response,
AV = +2, VS = +5 V, RL = 100 Ω
DS_54.png
Figure 52. Closed Loop Frequency Response
vs. Temperature
VS = ±5 V, AV = +1, RL = 100 Ω
DS_58.png
Figure 54. Closed Loop Frequency Response
vs. Temperature,
VS = ±15 V, AV = +2, RL= 100 Ω
DS_60.png
Figure 56. Closed Loop Frequency Response
vs. Temperature,
VS = +5 V, AV = +2, RL = 100 Ω
DS_62.png
Figure 58. Closed Loop Frequency Response
vs. Capacitive Load
(AV = +1, VS = ±5 V)
DS_64_v2.png
Figure 60. Closed Loop Frequency Response
vs. Capacitive Load
(AV = +2, VS = ±5 V)
DS_81.png
Figure 62. Total Harmonic Distortion vs. Frequency
DS_82.png
Figure 64. Total Harmonic Distortion vs. Frequency
DS_84.png
Figure 66. Undistorted Output Swing vs. Frequency
DS_65_temp.png
Figure 68. Total Power Dissipation vs. Ambient Temperature