SNVS731B September   2011  – June 2019 LMR12010

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Ratings
    3. 6.3 Electrical Characteristics
    4. 6.4 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Boost Function
      2. 7.3.2 Enable Pin / Shutdown Mode
      3. 7.3.3 Soft Start
      4. 7.3.4 Output Overvoltage Protection
      5. 7.3.5 Undervoltage Lockout
      6. 7.3.6 Current Limit
      7. 7.3.7 Thermal Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1.      Typical Application
      2. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 Inductor Selection
        3. 8.2.1.3 Input Capacitor
        4. 8.2.1.4 Output Capacitor
        5. 8.2.1.5 Catch Diode
        6. 8.2.1.6 Boost Diode
        7. 8.2.1.7 Boost Capacitor
        8. 8.2.1.8 Output Voltage
        9. 8.2.1.9 Calculating Efficiency, and Junction Temperature
      3. 8.2.2 Application Curves
  9. 9 Layout
    1. 9.1 Layout Considerations
    2. 9.2 Calculating The LMR12010 Junction Temperature
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Community Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDC|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.9 Calculating Efficiency, and Junction Temperature

The complete LMR12010 DC/DC converter efficiency can be calculated in the following manner.

Equation 24. LMR12010 30166561.gif

Or

Equation 25. LMR12010 30166562.gif

Calculations for determining the most significant power losses are shown below. Other losses totaling less than 2% are not discussed.

Power loss (PLOSS) is the sum of two basic types of losses in the converter, switching and conduction. Conduction losses usually dominate at higher output loads, where as switching losses remain relatively fixed and dominate at lower output loads. The first step in determining the losses is to calculate the duty cycle (D).

Equation 26. LMR12010 30166563.gif

VSW is the voltage drop across the internal NFET when it is on, and is equal to:

Equation 27. VSW = IOUT x RDSON

VD is the forward voltage drop across the Schottky diode. It can be obtained from the Electrical Characteristics. If the voltage drop across the inductor (VDCR) is accounted for, the equation becomes:

Equation 28. LMR12010 30166564.gif

This usually gives only a minor duty cycle change, and has been omitted in the examples for simplicity.

The conduction losses in the free-wheeling Schottky diode are calculated as follows:

Equation 29. PDIODE = VD × IOUT(1-D)

Often this is the single most significant power loss in the circuit. Care should be taken to choose a Schottky diode that has a low forward voltage drop.

Another significant external power loss is the conduction loss in the output inductor. The equation can be simplified to:

Equation 30. PIND = IOUT2 × RDCR

The LMR12010 conduction loss is mainly associated with the internal NFET:

Equation 31. PCOND = IOUT2 × RDSON × D

Switching losses are also associated with the internal NFET. They occur during the switch on and off transition periods, where voltages and currents overlap resulting in power loss. The simplest means to determine this loss is to empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node:

Equation 32. PSWF = 1/2(VIN × IOUT × freq × TFALL)
Equation 33. PSWR = 1/2(VIN × IOUT × freq × TRISE)
Equation 34. PSW = PSWF + PSWR

Table 1. Typical Rise And Fall Times vs Input Voltage

VIN TRISE TFALL
5 V 8 ns 4 ns
10 V 9 ns 6 ns
15 V 10 ns 7 ns

Another loss is the power required for operation of the internal circuitry:

Equation 35. PQ = IQ × VIN

IQ is the quiescent operating current, and is typically around 1.5mA. The other operating power that needs to be calculated is that required to drive the internal NFET:

Equation 36. PBOOST = IBOOST × VBOOST

VBOOST is normally between 3 VDC and 5 VDC. The IBOOST rms current is approximately 4.25 mA. Total power losses are:

Equation 37. LMR12010 30166577.gif

Table 2. Design Example 1

VIN 5 V POUT 2.5 W
VOUT 2.5 V PDIODE 151 mW
IOUT 1 A PIND 75 mW
VD 0.35 V PSWF 53 mW
Freq 3 MHz PSWR 53 mW
IQ 1.5 mA PCOND 187 mW
TRISE 8 ns PQ 7.5 mW
TFALL 8 ns PBOOST 21 mW
RDSON 330 mΩ PLOSS 548 mW
INDDCR 75 mΩ
D 0.568

η = 82%