SNVS086K May   2000  – July 2015 LP2989LV

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High-Accuracy Output Voltage
      2. 7.3.2 Sleep Mode
      3. 7.3.3 Error Detection Comparator Output
      4. 7.3.4 Short Circuit Protection (Current Limit)
      5. 7.3.5 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With 16 V ≥ VIN > VOUT(TARGET) + 1 V
      2. 7.4.2 Operation with Shutdown Control
      3. 7.4.3 Shutdown Input Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 WSON Package Devices
        2. 8.2.2.2 External Capacitors
          1. 8.2.2.2.1 Input Capacitor
          2. 8.2.2.2.2 Output Capacitor
          3. 8.2.2.2.3 Noise Bypass Capacitor
        3. 8.2.2.3 Capacitor Characteristics
          1. 8.2.2.3.1 Ceramic
          2. 8.2.2.3.2 Tantalum
          3. 8.2.2.3.3 Film
        4. 8.2.2.4 Reverse Input-Output Voltage
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

For best overall performance, place all circuit components on the same side of the circuit board and as near as practical to the respective LDO pin connections. Place ground return connections to the input and output capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics, and thereby reduces load-current transients, minimizes noise, and increases circuit stability. A ground reference plane is also recommended and is either embedded in the PCB itself or located on the bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output voltage, shield noise, and behaves similarly to a thermal plane to spread (or sink) heat from the LDO device. In most applications, this ground plane is necessary to meet thermal requirements.

10.2 Layout Example

LP2989LV layout_LP2989_snvs083.gifFigure 16. LP2989LV Layout Example

10.2.1 Thermal Considerations

CAUTION

Due to the limited power dissipation characteristics of the available SOIC (D) and WSON (NGN) packages, all possible combinations of output current (IOUT), input voltage (VIN), and ambient temperatures (TA) cannot be ensured.

Power dissipation, PD is calculated from the following formula:

Equation 1. PD = ((VIN – VOUT) × IOUT)

The LP2989LV regulator has internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions, the recommended maximum operating junction temperature is 125°C. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered.

For surface-mount devices, heat sinking is accomplished by using the heat-spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat generated by power devices.

Example: Given an output voltage of 1.8 V, an input voltage range of 4 V to 6 V, a maximum output current of 100 mA, and a maximum ambient temperature of 50°C, what is the maximum operating junction temperature? The maximum power dissipated by the device (PD(MAX)) is found using the formula in Equation 2:

Equation 2. PD(MAX) = ((VIN(MAX) – VOUT) × IOUT(MAX)

Using Equation 2, the result is:

PD(MAX) = ((6 V – 1.8 V) × 100 mA ) = 0.42 W

where

  • IOUT(MAX) = 100 mA
  • VIN(MAX) = 6 V
  • VOUT = 1.8 V

Using the 8-pin SOIC (D) package, the LP2989LV junction-to-ambient thermal resistance (RθJA) has a rating of 114.5°C/W using the standard JEDEC JESD51-7 PCB (High-K) circuit board.

Equation 3. TRISE = PD(MAX) × RθJA

Thus, The junction temperature rise above ambient (TRISE) using the formula in Equation 3 is:

TRISE = 0.42 W × 114.5°C/W = 48.1°C

The junction temperature rise can then be added to the maximum ambient temperature to find the estimated operating junction temperature (TJ) using the formula in Equation 4:

Equation 4. TJ(MAX) = TA(MAX) + TRISE

which gives the following results:

TJ(MAX) = 50°C + 48.1°C = 98.1°C