SNVS673E April   2010  – September 2014 LP8551

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Default Values
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Boost Converter Electrical Characteristics
    7. 7.7  LED Driver Electrical Characteristics
    8. 7.8  PWM Interface Characteristics
    9. 7.9  Undervoltage Protection
    10. 7.10 Logic Interface Characteristics
    11. 7.11 I2C Serial Bus Timing Parameters (SDA, SCLK)
    12. 7.12 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Clock Generation
      2. 8.3.2 Brightness Control Methods
        1. 8.3.2.1  PWM Input Duty Cycle
        2. 8.3.2.2  Brightness Register Control
        3. 8.3.2.3  PWM Direct Control
        4. 8.3.2.4  PWM Calculation Data Flow
        5. 8.3.2.5  PWM Detector
        6. 8.3.2.6  Brightness Control
        7. 8.3.2.7  Resolution Selector
        8. 8.3.2.8  Sloper
        9. 8.3.2.9  PWM Comparator
        10. 8.3.2.10 Current Setting
        11. 8.3.2.11 PWM Frequency Setting
        12. 8.3.2.12 Phase Shift PWM (PSPWM) Scheme
        13. 8.3.2.13 Slope
        14. 8.3.2.14 Driver Headroom Control
      3. 8.3.3 Boost Converter
        1. 8.3.3.1 Operation
        2. 8.3.3.2 Protection
        3. 8.3.3.3 Manual Output Voltage Control
        4. 8.3.3.4 Adaptive Boost Control
      4. 8.3.4 Fault Detection
        1. 8.3.4.1 LED Fault Detection
        2. 8.3.4.2 Undervoltage Detection
        3. 8.3.4.3 Overcurrent Protection
        4. 8.3.4.4 Device Thermal Regulation
        5. 8.3.4.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Modes of Operation
    5. 8.5 Programming
      1. 8.5.1 I2C-Compatible Serial Bus Interface
        1. 8.5.1.1 Interface Bus Overview
        2. 8.5.1.2 Data Transactions
        3. 8.5.1.3 Acknowledge Cycle
        4. 8.5.1.4 “Acknowledge After Every Byte” Rule
        5. 8.5.1.5 Addressing Transfer Formats
        6. 8.5.1.6 Control Register Write Cycle
        7. 8.5.1.7 Control Register Read Cycle
        8. 8.5.1.8 Register Read and Write Detail
      2. 8.5.2 EEPROM
    6. 8.6 Register Map
      1. 8.6.1 Register Bit Explanations
        1. 8.6.1.1 Brightness Control
        2. 8.6.1.2 Device Control
        3. 8.6.1.3 Fault
        4. 8.6.1.4 Identification
        5. 8.6.1.5 Direct Control
        6. 8.6.1.6 Temp MSB
        7. 8.6.1.7 Temp LSB
        8. 8.6.1.8 EEPROM Control
      2. 8.6.2 EEPROM Bit Explanations
        1. 8.6.2.1 EEPROM Register Map
        2. 8.6.2.2 EEPROM Address 0
        3. 8.6.2.3 EEPROM Address 1
        4. 8.6.2.4 EEPROM Address 2
        5. 8.6.2.5 EEPROM Address 3
        6. 8.6.2.6 EEPROM Address 4
        7. 8.6.2.7 EEPROM Address 5
        8. 8.6.2.8 EEPROM Address 7
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application Using Internal LDO
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Recommended External Components
            1. 9.2.1.2.1.1 Inductor Selection
            2. 9.2.1.2.1.2 Output Capacitor
            3. 9.2.1.2.1.3 LDO Capacitor
            4. 9.2.1.2.1.4 Output Diode
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Application with Low-Input Voltage
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DSBGA
25
Top View
30121275.gif
DSBGA
25
Bottom View
30121272.gif

Pin Functions

PIN TYPE(1) DESCRIPTION
NUMBER NAME
A1 GND_SW G Boost switch ground
A2 GND_SW G Boost switch ground
A3 EN I Enable input pin
A4 PWM A PWM dimming input. This pin must be connected to GND if not used.
A5 FB A Boost feedback input
B1 SW A Boost switch
B2 SW A Boost switch
B3 ISET A Set resistor for LED current. This pin can be left floating if not used.
B4 FSET A PWM frequency set resistor. This pin can be left floating if not used.
B5 GND_S G Signal ground
C1 VIN P Input power supply up to 22 V. If 2.7 V ≤ VBATT < 5.5 V (Figure 25) then an external 5-V rail must be used for VLDO and VIN.
C2 NC - Not connected
C3 FAULT OD Fault indication output. If not used, can be left floating.
C4 VDDIO P Digital IO reference voltage (1.65 V to 5 V) for I2C interface. If brightness is controlled with PWM input pin then this pin can be connected to GND.
C5 OUT3 A Current sink output
D1 VLDO P LDO output voltage. External 5-V rail can be connected to this pin in low voltage application.
D2 GND G Ground
D3 SCLK I Serial clock. This pin must be connected to GND if not used.
D4 SDA I/O Serial data. This pin must be connected to GND if not used.
D5 OUT2 A Current sink output
E1 NC - Not connected
E2 NC - Not connected
E3 OUT4 A Current sink output
E4 GND_L G LED ground
E5 OUT1 A Current sink output
(1) A: Analog Pin, G: Ground Pin, P: Power Pin, I: Input Pin, I/O: Input/Output Pin, O: Output Pin, OD: Open Drain Pin