SNVS673E April   2010  – September 2014 LP8551

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Default Values
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Boost Converter Electrical Characteristics
    7. 7.7  LED Driver Electrical Characteristics
    8. 7.8  PWM Interface Characteristics
    9. 7.9  Undervoltage Protection
    10. 7.10 Logic Interface Characteristics
    11. 7.11 I2C Serial Bus Timing Parameters (SDA, SCLK)
    12. 7.12 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Clock Generation
      2. 8.3.2 Brightness Control Methods
        1. 8.3.2.1  PWM Input Duty Cycle
        2. 8.3.2.2  Brightness Register Control
        3. 8.3.2.3  PWM Direct Control
        4. 8.3.2.4  PWM Calculation Data Flow
        5. 8.3.2.5  PWM Detector
        6. 8.3.2.6  Brightness Control
        7. 8.3.2.7  Resolution Selector
        8. 8.3.2.8  Sloper
        9. 8.3.2.9  PWM Comparator
        10. 8.3.2.10 Current Setting
        11. 8.3.2.11 PWM Frequency Setting
        12. 8.3.2.12 Phase Shift PWM (PSPWM) Scheme
        13. 8.3.2.13 Slope
        14. 8.3.2.14 Driver Headroom Control
      3. 8.3.3 Boost Converter
        1. 8.3.3.1 Operation
        2. 8.3.3.2 Protection
        3. 8.3.3.3 Manual Output Voltage Control
        4. 8.3.3.4 Adaptive Boost Control
      4. 8.3.4 Fault Detection
        1. 8.3.4.1 LED Fault Detection
        2. 8.3.4.2 Undervoltage Detection
        3. 8.3.4.3 Overcurrent Protection
        4. 8.3.4.4 Device Thermal Regulation
        5. 8.3.4.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Modes of Operation
    5. 8.5 Programming
      1. 8.5.1 I2C-Compatible Serial Bus Interface
        1. 8.5.1.1 Interface Bus Overview
        2. 8.5.1.2 Data Transactions
        3. 8.5.1.3 Acknowledge Cycle
        4. 8.5.1.4 “Acknowledge After Every Byte” Rule
        5. 8.5.1.5 Addressing Transfer Formats
        6. 8.5.1.6 Control Register Write Cycle
        7. 8.5.1.7 Control Register Read Cycle
        8. 8.5.1.8 Register Read and Write Detail
      2. 8.5.2 EEPROM
    6. 8.6 Register Map
      1. 8.6.1 Register Bit Explanations
        1. 8.6.1.1 Brightness Control
        2. 8.6.1.2 Device Control
        3. 8.6.1.3 Fault
        4. 8.6.1.4 Identification
        5. 8.6.1.5 Direct Control
        6. 8.6.1.6 Temp MSB
        7. 8.6.1.7 Temp LSB
        8. 8.6.1.8 EEPROM Control
      2. 8.6.2 EEPROM Bit Explanations
        1. 8.6.2.1 EEPROM Register Map
        2. 8.6.2.2 EEPROM Address 0
        3. 8.6.2.3 EEPROM Address 1
        4. 8.6.2.4 EEPROM Address 2
        5. 8.6.2.5 EEPROM Address 3
        6. 8.6.2.6 EEPROM Address 4
        7. 8.6.2.7 EEPROM Address 5
        8. 8.6.2.8 EEPROM Address 7
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application Using Internal LDO
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Recommended External Components
            1. 9.2.1.2.1.1 Inductor Selection
            2. 9.2.1.2.1.2 Output Capacitor
            3. 9.2.1.2.1.3 LDO Capacitor
            4. 9.2.1.2.1.4 Output Diode
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Application with Low-Input Voltage
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Power Supply Recommendations

The device is designed to operate from an input voltage supply range between 2.7 V and 22 V. This input supply should be well regulated and able to withstand maximum input current and maintain stable voltage without voltage drop even at load transition condition (start-up or rapid brightness change). The resistance of the input supply rail should be low enough that the input current transient does not cause drop high enough in the LP8551 supply voltage that can cause false UVLO fault triggering.

If a separate 5-V power rail is used to power LP8551 VLDO/VIN pins, this voltage must be stable 4.5 V to 5 V. Excessive noise or ripple in this rail can have adverse effect on device performance, so good grounding and sufficient bypass capacitors must be used.

If the input supply is located more than a few inches from the LP8551 additional bulk capacitance may be required in addition to the ceramic bypass capacitors. Depending on device EPROM configuration and usage case the boost converter is configured to operate optimally with certain input voltage range. Examples are seen in the Detailed Design Procedure section. In uncertain cases, it is recommended to contact a TI Sales Representative for confirmation of the compatibility of the use case, EPROM configuration, and input voltage range.