SDLS975 April   2024 LSF0002

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics (Translating Down): BN = 3.3V
    7. 5.7 Switching Characteristics (Translating Down): BN = 2.5V
    8. 5.8 Switching Characteristics (Translating Up): BN = 3.3V
    9. 5.9 Switching Characteristics (Translating Up):BN = 2.5V
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Auto Bidirectional Voltage Translation
      2. 7.3.2 VBIAS/ Enable
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Open-Drain Interface (I2C, PMBus, SMBus, and GPIO)
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Enable and Disable Guidelines
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Bidirectional Translation
          2. 8.2.1.2.2 Pull-Up Resistor Sizing
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Mixed-Mode Voltage Translation
      3. 8.2.3 Voltage Translation for Vref_B < Vref_A + 0.8V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DTQ|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2 VBIAS/ Enable

To enable the I/O pins, the VBIAS input should be referenced towards the lower power supply (in the following example, VEXT,A) during voltage translation. To be in the high impedance state during power-up, power-down, or during operation, the VBIAS pin must be pulled low and at GND or disabled by an open-drain driver without a pullup resistor. Use the VBIAS pin to properly bias the I/O channels. A filter capacitor on VBIAS is also recommended for a stable supply at the device.

LSF0002 VBIAS Tied to Lower Power SupplyFigure 7-1 VBIAS Tied to Lower Power Supply

The supply voltage of open drain I/O devices can be completely different from the supplies used for the LSF and has no impact on the operation. For additional details on how to use the enable pin, see the Using the Enable Pin with the LSF Family video.

Table 7-1 Enable Pin Function Table
INPUT VBIASPINData Port State
Tied directly to VBIASAn = Bn
LHi-Z