SBOS771A December   2016  – January 2019 OPA4277-SP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: CFP
    2.     Pin Functions: CDIP
    3. 5.1 Bare Die Information
      1.      Bond Pad Coordinates in Microns
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Protection
      2. 7.3.2 Input Bias Current Cancellation
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

HFR Package
14-Pin CFP
Top View

Pin Functions: CFP

PIN I/O DESCRIPTION
NO. NAME
1 OUT A O Output channel A.
2 –IN A I Inverting input channel A.
3 +IN A I Noninverting input channel A.
4 V+ — Positive (highest) power supply.
5 +IN B I Noninverting input channel B.
6 –IN B I Inverting input channel B.
7 OUT B O Output channel B.
8 OUT C O Output channel C.
9 –IN C I Inverting input channel C.
10 +IN C I Noninverting input channel C.
11 V– — Negative (lowest) power supply.
12 +IN D I Noninverting input channel D.
13 –IN D I Inverting input channel D.
14 OUT D O Output channel D.
JDJ Package
28-Pin CDIP
Top View
OPA4277-SP SBOS771_CDIP_pinout.gif
NC - no internal connection

Pin Functions: CDIP

PIN I/O DESCRIPTION
NO. NAME
1, 3, 4, 8, 11, 12, 14, 15, 17, 18, 21, 25, 26, 28 NC — Not connected.
2 OUT A O Output (channel A).
5 –IN A I Inverting input (channel A).
6 +IN A I Noninverting input (channel A).
7 +VS — Positive (highest) power supply.
9 +IN B I Inverting input (channel B).
10 –IN B I Noninverting input (channel B).
13 OUT B O Output (channel B).
16 OUT C O Output (channel C).
19 +IN C I Inverting input (channel C).
20 –IN C I Noninverting input (channel C).
22 –VS — Negative (lowest) power supply.
23 +IN D I Inverting input (channel D).
24 –IN D I Noninverting input (channel D).
27 OUT D O Output (channel D).