SCPS178C July   2007  – April 2022 PCA9306-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics: Translating Down, VIH = 3.3 V
    7. 7.7  Switching Characteristics: Translating Down, VIH = 2.5 V
    8. 7.8  Switching Characteristics: Translating Up, VIH = 2.3 V
    9. 7.9  Switching Characteristics: Translating Up, VIH = 1.5 V
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Definition of threshold voltage
      2. 9.1.2 Correct Device Set Up
      3. 9.1.3 Disconnecting a Target from the Main I2C Bus Using the EN Pin
      4. 9.1.4 Supporting Remote Board Insertion to Backplane with PCA9306-Q1
      5. 9.1.5 Switch Configuration
      6. 9.1.6 Controller on Side 1 or Side 2 of Device
      7. 9.1.7 LDO and PCA9306-Q1 Concerns
      8. 9.1.8 Current Limiting Resistance on VREF2
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable (EN) Pin
      2. 9.3.2 Voltage Translation
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 General Applications of I2C
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Bidirectional Translation
        2. 10.2.2.2 Sizing Pullup Resistor
        3. 10.2.2.3 PCA9306-Q1 Bandwidth
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.2.1 Bidirectional Translation

For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage), the EN input must be connected to VREF2 and both pins pulled to high-side VDPU through a pullup resistor (typically 200 kΩ). This allows VREF2 to regulate the EN input. A filter capacitor on VREF2 is recommended. The I2C bus controller output can be totem-pole or open-drain (pullup resistors may be required) and the I2C bus device output can be totem-pole or open-drain (pullup resistors are required to pull the SCL2 and SDA2 outputs to VDPU). However, if either output is totem-pole, data must be unidirectional or the outputs must be 3-stateable and be controlled by some direction-control mechanism to prevent high-to-low contentions in either direction. If both outputs are open-drain, no direction control is needed.

The reference supply voltage (VREF1) is connected to the processor core power-supply voltage.