SCPS069G July   2001  – August 2021 PCF8574A

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
      1. 8.2.1 Simplified Block Diagram of Device
      2. 8.2.2 Simplified Schematic Diagram of Each P-Port Input/Output
    3. 8.3 Feature Description
      1. 8.3.1 I2C Interface
      2. 8.3.2 Interface Definition
      3. 8.3.3 Address Reference
    4. 8.4 Device Functional Modes
  9. Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Minimizing ICC When I/Os Control LEDs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Glossary
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGV|20
  • DW|16
  • N|16
  • PW|20
  • RGY|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC MIN TYP(1) MAX UNIT
VIK Input diode clamp voltage II = –18 mA 2.5 V to 6 V –1.2 V
VPOR Power-on reset voltage(2) VI = VCC or GND, IO = 0 6 V 1.3 2.4 V
IOH P port VO = GND 2.5 V to 6 V 30 300 μA
IOHT P-port transient pullup current High during acknowledge, VOH = GND 2.5 V –1 mA
IOL SDA VO = 0.4 V 2.5 V to 6 V 3 mA
P port VO = 1 V 5 V 10 25
INT VO = 0.4 V 2.5 V to 6 V 1.6
II SCL, SDA VI = VCC or GND 2.5 V to 6 V ±5 μA
INT ±5
A0, A1, A2 ±5
IIHL P port VI  ≥ VCC or VI  ≤ GND 2.5 V to 6 V ±400 μA
ICC Operating mode VI = VCC or GND, IO = 0, fSCL = 100 kHz 6 V 40 100 μA
Standby mode VI = VCC or GND, IO = 0 2.5 10
Ci SCL VI = VCC or GND 2.5 V to 6 V 1.5 7 pF
Cio SDA VIO = VCC or GND 2.5 V to 6 V 3 7 pF
P port 4 10
All typical values are at VCC = 5 V, TA = 25°C.
The power-on reset circuit resets the I2C-bus logic with VCC < VPOR and sets all I/Os to logic high (with current source to VCC).