SLOS982C August 2017 – April 2018 TAS5755M
PRODUCTION DATA.
The clocks and data rates are automatically determined by the TAS5755M. The clock control register contains the auto-detected clock status. Bits D7–D5 reflect the sample rate. Bits D4–D2 reflect the MCLK frequency. The device accepts a 64 fS or 32 fS SCLK rate for all MCLK ratios, but accepts a 48 fS SCLK rate for MCLK ratios of 192 fS and 384 fS only.
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | FUNCTION |
0 | 0 | 0 | – | – | – | – | – | fS = 32-kHz sample rate |
0 | 0 | 1 | – | – | – | – | – | Reserved(4) |
0 | 1 | 0 | – | – | – | – | – | Reserved(4) |
0 | 1 | 1 | – | – | – | – | – | fS = 44.1/48-kHz sample rate(1) |
1 | 0 | 0 | – | – | – | – | – | fS = 16-kHz sample rate |
1 | 0 | 1 | – | – | – | – | – | fS = 22.05/24-kHz sample rate |
1 | 1 | 0 | – | – | – | – | – | fS = 8-kHz sample rate |
1 | 1 | 1 | – | – | – | – | – | fS = 11.025/12-kHz sample rate |
– | – | – | 0 | 0 | 0 | – | – | MCLK frequency = 64 × fS(2) |
– | – | – | 0 | 0 | 1 | – | – | MCLK frequency = 128 × fS(2) |
– | – | – | 0 | 1 | 0 | – | – | MCLK frequency = 192 × fS(3) |
– | – | – | 0 | 1 | 1 | – | – | MCLK frequency = 256 × fS(1)(5) |
– | – | – | 1 | 0 | 0 | – | – | MCLK frequency = 384 × fS |
– | – | – | 1 | 0 | 1 | – | – | MCLK frequency = 512 × fS |
– | – | – | 1 | 1 | 0 | – | – | Reserved(4) |
– | – | – | 1 | 1 | 1 | – | – | Reserved(4) |
– | – | – | – | – | – | 0 | – | Reserved(4)(1) |
– | – | – | – | – | – | – | 0 | Reserved(4)(1) |