SCPS244C June   2013  – January 2024 TCA9617A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7.   Parameter Measurement Information
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Bidirectional Level Translation
      2. 6.3.2 VOL B-side Offset Voltage
      3. 6.3.3 High to Low Transition Characteristics
    4. 6.4 Device Functional Modes
  9. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Standard Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Pullup Resistor Sizing
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Star Application
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
      3. 7.2.3 Series Application
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
        3. 7.2.3.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
7.2.1.2.1 Pullup Resistor Sizing

For the TCA9617A to function correctly, all devices on the B-side must be able to pull the B-side below the voltage input low contention level (0.4V). This means that the VOL of any device on the B-side must be below 0.4V for proper operation.

The VOL of a device can be adjusted by changing the IOL through the device which is set by the pull-up resistor value. The pull-up resistor on the B-side must be carefully selected to make sure the logic levels is transferred correctly to the A-side.

The B-side pull-up resistor sizing must also make sure that the rise time is greater than 20ns. Shorter rise times increase the pedestal overshoot shown in Figure 7-2.