SGLS156F March   2003  – December 2016 TLC3702-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 LinCMOS™ Process
      2. 8.3.2 Electrostatic Discharge
      3. 8.3.3 Input Protection Circuit Operation
      4. 8.3.4 Positive ESD Transients
      5. 8.3.5 Negative ESD Transients
      6. 8.3.6 Circuit-Design Considerations
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Achieving Greater Noise Immunity
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Two-Phase Non-Overlapping Clock Generator
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • PW|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

D or PW Package
8-Pin SOIC or TSSOP
Top View
TLC3702-Q1 po_gls156.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
1IN+ 3 I Non-Inverting input channel 1
1IN- 2 I Inverting input channel 1
2IN+ 5 I Non-Inverting input channel 2
2IN- 6 I Inverting input channel 2
1OUT 1 O Output, Channel 1
1OUT 7 O Output, Channel 2
GND 4 - Negative (lowest) power supply
VDD 8 - Positive (highest) power supply