SLVSEB5A July   2018  – August 2018 TLC6C5716-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Typical Application Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Maximum Constant-Sink-Current Setting
      2. 7.3.2 Brightness Control and Dot Correction
      3. 7.3.3 Grayscale Configuration
        1. 7.3.3.1 PWM Auto Repeat
        2. 7.3.3.2 PWM Timing Reset
      4. 7.3.4 Diagnostics
        1. 7.3.4.1  LED Diagnostics
        2. 7.3.4.2  Adjacent-Pin-Short Check
        3. 7.3.4.3  IREF-Short and IREF-Open Detection
        4. 7.3.4.4  Pre-Thermal Warning Flag
        5. 7.3.4.5  Thermal Error Flag
        6. 7.3.4.6  Negate-Bit Toggle
        7. 7.3.4.7  LOD_LSD Self-Test
        8. 7.3.4.8  ERR Pin
        9. 7.3.4.9  ERROR Clear
        10. 7.3.4.10 Global Reset
        11. 7.3.4.11 Slew Rate Control
        12. 7.3.4.12 Channel Group Delay
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Up
      2. 7.4.2 Device Initialization
      3. 7.4.3 Fault Mode
      4. 7.4.4 Normal Operation
    5. 7.5 Programming
      1. 7.5.1 Register Write and Read
        1. 7.5.1.1 FC-BC-DC Write
          1. 7.5.1.1.1 FC Data Write
          2. 7.5.1.1.2 BC Data Write
          3. 7.5.1.1.3 DC Data Write
        2. 7.5.1.2 Grayscale Data Write
        3. 7.5.1.3 Special Command Function
          1. 7.5.1.3.1 GS Read
          2. 7.5.1.3.2 FC-BC-DC Read
          3. 7.5.1.3.3 Status Information Data Read
    6. 7.6 Register Maps
      1. 7.6.1 GRAYSCALE Registers
        1. 7.6.1.1 OUTn_GS Register (Offset = 0h)
          1. Table 25. OUTn_GS Register Field Descriptions
      2. 7.6.2 FC-BC-DC Registers
        1. 7.6.2.1 FC-BC-DC Register (Offset = 1h)
          1. Table 28. FC-BC-DC Register Field Descriptions
      3. 7.6.3 SID Registers
        1. 7.6.3.1 SID Register (Offset = 2h)
          1. Table 31. SID Register Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

7.6.3.1 SID Register (Offset = 2h)

SID is shown in Figure 30 and described in Table 31.

Return to Summary Table.

Status information data

Figure 30. SID Register
287 286 285 284 283 282 281 280 279 278 277 276 275 274 273 272
OUTB_LOD2 RESERVED
R-0h R-0h
271 270 269 268 267 266 265 264 263 262 261 260 259 258 257 256
OUTR_LOD2 OUTB_LOD1
R-0h R-0h
255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
RESERVED OUTR_LOD1
R-0h R-0h
239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224
OUTB_APS NU_PIN_APS
R-0h R-0h
223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 208
OUTR_APS TEF PTW APS_FLAG ISF IOF →
R-0h R-0h R-0h R-0h R-0h R-0h →
207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192
← LOD_LSD_FLAG NEG1 NEG0 RESERVED
← R-0h R-0h R-0h R-0h
191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176
OUTB_LSD2 RESERVED
R-0h R-0h
175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
OUTR_LSD2 OUTB_LSD1
R-0h R-0h
159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144
RESERVED OUTR_LSD1
R-0h R-0h
143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128
RESERVED
R-0h
127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112
RESERVED
R-0h
111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96
RESERVED
R-0h
95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80
RESERVED
R-0h
79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64
RESERVED
R-0h
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
RESERVED
R-0h
47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RESERVED
R-0h
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESERVED
R-0h
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
R-0h

Table 31. SID Register Field Descriptions

Bit Field Type Default Description
287–280 OUTB_LOD2[7:0] R 0h

LOD2 for OUTB7–OUTB0. For each channel:

0h = No fault detected

1h = Fault detected

279–272 RESERVED R 0h

Reserved
271–264 OUTR_LOD2[7:0] R 0h

LOD2 for OUTR7–OUTR0. For each channel:

0h = No fault detected

1h = Fault detected

263–256 OUTB_LOD1[7:0] R 0h

LOD1 for OUTB7–OUTB0. For each channel:

0h = No fault detected

1h = Fault detected

255–248 RESERVED R 0h

Reserved
247–240 OUTR_LOD1[7:0] R 0h

LOD1 for OUTR7–OUTR0. For each channel:

0h = No fault detected

1h = Fault detected

239–232 OUTB_APS[7:0] R 0h

APS status for OUTB7–OUTB0. For each channel:

0h = No fault detected

1h = Fault detected

231–224 NU_PIN_APS[7:0] R 0h

APS status of not-used pins , NU_PIN_APS[7:0] = [pin7, pin10, pin13, pin16, pin23, pin26, pin29, pin32]

0h = No fault detected

1h = Fault detected

223–216 OUTR_APS[7:0] R 0h

APS status for OUTR7–OUTR0. For each channel:

0h = No fault detected

1h = Fault detected

215 TEF R 0h

Thermal error flag

0h = No fault detected

1h = Fault detected

214 PTW R 0h

Pre-thermal warning flag

0h = No fault detected

1h = Fault detected

213–211 APS_FLAG[2:0] R 0h

APS test flag fault

3h = APS test passes

6h = APS test fails
210 ISF R 0h

ISF fault

0h = No fault detected

1h = Fault detected

209 IOF R 0h

IOF fault

0h = No fault detected

1h = Fault detected

208– 206 LOD_LSD_FLAG[2:0] R 0h

LOD_LSD self-test flag

3h = LOD_LSD self-test passes

6h = LOD_LSD self-test fails
205 NEG1 R 0h

Neg1 bit value
204 NEG0 R 0h

Neg0 bit value

203–192 RESERVED R 0h

Reserved
191–184 OUTB_LSD2[7:0] R 0h

LSD2 for OUTB7–OUTB0. For each channel:

0h = No fault detected

1h = Fault detected

183–176 RESERVED R 0h

Reserved
175–168 OUTR_LSD2[7:0] R 0h

LSD2 for OUTR7–OUTR0. For each channel:

0h = No fault detected

1h = Fault detected

167–160 OUTB_LSD1[7:0] R 0h

LSD1 for OUTB7– OUTB0. For each channel:

0h = No fault detected

1h = Fault detected

159–152 RESERVED R 0h

Reserved
151–144 OUTR_LSD1[7:0] R 0h

LSD1 for OUTR7–OUTR0. For each channel:

0h = No fault detected

1h = Fault detected

143–0 RESERVED R 0h

Reserved