SLVSFI5A October   2020  – December 2020 TLC6C5748-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Terminal Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Terminal-Equivalent Input and Output Schematic Diagrams
    2. 7.2 Test Circuits
    3. 7.3 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Current Calculation
      2. 8.3.2 Register and Data Latch Configuration
        1. 8.3.2.1 769-Bit Common Shift Register
        2. 8.3.2.2 Grayscale (GS) Data Latch
        3. 8.3.2.3 Control Data Latch
        4. 8.3.2.4 Dot Correction (DC) Data Latch
        5. 8.3.2.5 Maximum Current (MC) Data Latch
        6. 8.3.2.6 Global Brightness Control (BC) Data Latch
        7. 8.3.2.7 Function Control (FC) Data Latch
      3. 8.3.3 Status Information Data (SID)
      4. 8.3.4 LED Open Detection (LOD)
      5. 8.3.5 LED Short Detection (LSD)
      6. 8.3.6 Thermal Shutdown Faults (TSD)
      7. 8.3.7 Noise Reduction
    4. 8.4 Device Functional Modes
      1. 8.4.1 Maximum Current Control (MC) Function
      2. 8.4.2 Dot Correction (DC) Function
      3. 8.4.3 Global Brightness Control (BC) Function
      4. 8.4.4 Grayscale (GS) Function (PWM Control)
        1. 8.4.4.1 Conventional PWM Control
        2. 8.4.4.2 Enhanced Spectrum (ES) PWM Control
        3. 8.4.4.3 Auto Display Repeat Function
        4. 8.4.4.4 Display Timing Reset Function
        5. 8.4.4.5 Auto Data Refresh Function
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Daisy-Chain Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Step-by-Step Design Procedure
          2. 9.2.1.2.2 Maximum Current (MC) Data
          3. 9.2.1.2.3 Global Brightness Control (BC) Data
          4. 9.2.1.2.4 Dot Correction (DC) Data
          5. 9.2.1.2.5 Grayscale (GS) Data
          6. 9.2.1.2.6 Other Control Data
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.2.2 Grayscale (GS) Data Latch

The GS data latch is 768 bits long, and sets the PWM timing for each constant-current output. The on-time of all constant-current outputs is controlled by the data in this data latch. The 768-bit GS data in the common shift register are copied to the data latch at a LAT rising edge when the common shift resister MSB is 0.

When the device is powered up, the data are random and all constant-current outputs are forced off. However, no outputs turn on until GS data are written to the GS data latch even if a GSCLK is input. The data bit assignment is shown in Table 8-1. Refer to Figure 8-2 for a GS data write timing diagram.

Table 8-1 Grayscale Data Latch Bit Description
GS DATA LATCH BIT NUMBERBIT NAMEDEFAULT VALUECONTROLLED CHANNELGS DATA LATCH BIT NUMBERBIT NAMEDEFAULT VALUECONTROLLED CHANNEL
15-0GSR0[15:0]N/A
(no default value)		Bits[15:0] for OUTR0399-384GSR8[15:0]N/A
(no default value)		Bits[15:0] for OUTR8
31-16GSG0[15:0]Bits[15:0] for OUTG0415-400GSG8[15:0]Bits[15:0] for OUTG8
47-32GSB0[15:0]Bits[15:0] for OUTB0431-416GSB8[15:0]Bits[15:0] for OUTB8
63-48GSR1[15:0]Bits[15:0] for OUTR1447-432GSR9[15:0]Bits[15:0] for OUTR9
79-64GSG1[15:0]Bits[15:0] for OUTG1463-448GSG9[15:0]Bits[15:0] for OUTG9
95-80GSB1[15:0]Bits[15:0] for OUTB1479-464GSB9[15:0]Bits[15:0] for OUTB9
111-96GSR2[15:0]Bits[15:0] for OUTR2495-480GSR10[15:0]Bits[15:0] for OUTR10
127-112GSG2[15:0]Bits[15:0] for OUTG2511-496GSG10[15:0]Bits[15:0] for OUTG10
143-128GSB2[15:0]Bits[15:0] for OUTB2527-512GSB10[15:0]Bits[15:0] for OUTB10
159-144GSR3[15:0]Bits[15:0] for OUTR3543-528GSR11[15:0]Bits[15:0] for OUTR11
175-160GSG3[15:0]Bits[15:0] for OUTG3559-544GSG11[15:0]Bits[15:0] for OUTG11
191-176GSB3[15:0]Bits[15:0] for OUTB3575-560GSB11[15:0]Bits[15:0] for OUTB11
207-192GSR4[15:0]Bits[15:0] for OUTR4591-576GSR12[15:0]Bits[15:0] for OUTR12
223-208GSG4[15:0]Bits[15:0] for OUTG4607-592GSG12[15:0]Bits[15:0] for OUTG12
239-224GSB4[15:0]Bits[15:0] for OUTB4623-608GSB12[15:0]Bits[15:0] for OUTB12
255-240GSR5[15:0]Bits[15:0] for OUTR5639-624GSR13[15:0]Bits[15:0] for OUTR13
271-256GSG5[15:0]Bits[15:0] for OUTG5655-640GSG13[15:0]Bits[15:0] for OUTG13
287-272GSB5[15:0]Bits[15:0] for OUTB5671-656GSB13[15:0]Bits[15:0] for OUTB13
303-288GSR6[15:0]Bits[15:0] for OUTR6687-672GSR14[15:0]Bits[15:0] for OUTR14
319-304GSG6[15:0]Bits[15:0] for OUTG6703-688GSG14[15:0]Bits[15:0] for OUTG14
335-320GSB6[15:0]Bits[15:0] for OUTB6719-704GSB14[15:0]Bits[15:0] for OUTB14
351-336GSR7[15:0]Bits[15:0] for OUTR7735-720GSR15[15:0]Bits[15:0] for OUTR15
367-352GSG7[15:0]Bits[15:0] for OUTG7751-736GSG15[15:0]Bits[15:0] for OUTG15
383-368GSB7[15:0]Bits[15:0] for OUTB7767-752GSB15[15:0]Bits[15:0] for OUTB15
GUID-AC9843D5-04CF-4656-9F01-E150BA560F46-low.gifFigure 8-2 Grayscale Data Write Timing Diagram (RFRESH = 0)