SLOS993A March   2018  – June 2018 TPA3138D2

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      TPA3138 Layout with Ferrite Beads
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Analog Gain
      2. 9.3.2  SD/FAULT Operation
      3. 9.3.3  PLIMIT
      4. 9.3.4  Spread Spectrum and De-Phase Control
      5. 9.3.5  GVDD Supply
      6. 9.3.6  DC Detect
      7. 9.3.7  PBTL Select
      8. 9.3.8  Short-Circuit Protection and Automatic Recovery Feature
      9. 9.3.9  Over-Temperature Protection (OTP)
      10. 9.3.10 Over-Voltage Protection (OVP)
      11. 9.3.11 Under-Voltage Protection (UVP)
    4. 9.4 Device Functional Modes
      1. 9.4.1 MODE_SEL = LOW: BD Modulation
      2. 9.4.2 MODE_SEL = HIGH: Low-Idle-Current 1SPW Modulation
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 PCB Material Recommendation
        2. 10.2.1.2 PVCC Capacitor Recommendation
        3. 10.2.1.3 Decoupling Capacitor Recommendations
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Ferrite Bead Filter Considerations
        2. 10.2.2.2 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme
        3. 10.2.2.3 When to Use an Output Filter for EMI Suppression
        4. 10.2.2.4 Input Resistance
        5. 10.2.2.5 Input Capacitor, Ci
        6. 10.2.2.6 BSN and BSP Capacitors
        7. 10.2.2.7 Differential Inputs
        8. 10.2.2.8 Using Low-ESR Capacitors
      3. 10.2.3 Application Performance Curves
        1. 10.2.3.1 EN55013 Radiated Emissions Results
        2. 10.2.3.2 EN55022 Conducted Emissions Results
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Decoupling, CS
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.7 Typical Characteristics

All measurements taken at audio frequency = 1 kHz, closed-loop gain = 26 dB, BD mode, T A= 25°C, AES17 filter using the TPA3138D2EVM, unless otherwise noted.
TPA3138D2 D001.gif
AVCC=PVCC = 12 V, Load = 6 Ω + 47 µH, 1 W, 2.5 W, 5 W
Figure 1. THD+N vs Frequency (BTL)
TPA3138D2 D003.gif
AVCC=PVCC = 12 V, Load = 6 Ω + 47 µH, 20 Hz, 1 kHz
Figure 3. THD+N vs Output Power (BTL)
TPA3138D2 D005.gif
AVCC=PVCC = 7.5 V to 15 V, Load = 6 Ω + 47 µH
Figure 5. Output Power vs Supply Voltage (BTL)
TPA3138D2 D019_1SPW3138_6ohm.gif
AVCC=PVCC = 3.5 V to 15 V, Load = 6 Ω + 47 µH, Low-Idle-Current 1SPW Mode
Figure 7. Output Power vs Supply Voltage (BTL)
TPA3138D2 D007.gif
1.
AVCC= PVCC = 12 V, Load = 6 Ω + 47 µH
Figure 9. Gain and Phase vs Frequency (BTL)
TPA3138D2 D009.gif
AVCC=PVCC= 13 V, 14.4 V, Load = 8 Ω + 66 µH
Figure 11. Efficiency vs Output Power (BTL)
TPA3138D2 D012_SLOS993.gif
AVCC=PVCC = 13 V, Load = 4 Ω + 33 µH, 1 W, 2.5 W, 5 W
Figure 13. THD+N vs Frequency (PBTL)
TPA3138D2 D013.gif
AVCC=PVCC = 7.5 V to 14.4 V, Load = 4 Ω + 33 µH
Figure 15. Output Power vs Supply Voltage (PBTL)
TPA3138D2 D002.gif
AVCC=PVCC = 13 V, Load = 8 Ω + 66 µH, 1 W, 2.5 W, 5 W
Figure 2. THD+N vs Frequency (BTL)
TPA3138D2 D004.gif
AVCC=PVCC = 13 V, Load = 8 Ω + 66 µH, 20 Hz, 1 kHz
Figure 4. THD+N + Noise vs Output Power (BTL)
TPA3138D2 D006.gif
AVCC=PVCC = 7.5 V to 15 V, Load = 8 Ω + 66 µH
Figure 6. Output Power vs Supply Voltage (BTL)
TPA3138D2 D018_1SPW3138_8ohm.gif
1.
AVCC= PVCC = 3.5 V to 15 V, Load = 8 Ω + 66 µH, Low-Idle-Current 1SPW Mode
Figure 8. Output Power vs Supply Voltage (BTL)
TPA3138D2 D008.gif
AVCC=PVCC = 12 V, 14.4 V, Load = 6 Ω + 47 µH
Figure 10. Efficiency vs Output Power (BTL)
TPA3138D2 D010_SLOS993.gif
AVCC=PVCC = 12 V, 1 W, Load = 6 Ω + 47 µH
Figure 12. Crosstalk vs Frequency (BTL)
TPA3138D2 D013_SLOS993.gif
AVCC=PVCC = 13 V, Load = 4 Ω + 33 µH, 20 Hz, 1 kHz
Figure 14. THD+N vs Output Power (PBTL)
TPA3138D2 D014.gif
AVCC=PVCC = 13 V, 14.4 V, Load = 4 Ω + 33 µH
Figure 16. Efficiency vs Output Power (PBTL)