SLVSC42A August   2013  – April 2015 TPS22967

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Typical Application Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VBIAS = 5 V
    6. 7.6 Electrical Characteristics: VBIAS = 2.5 V
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
      1. 7.8.1 Typical AC Scope Captures at TA = 25ºC, CT = 1 nF
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ON/OFF Control
      2. 8.3.2 Adjustable Rise Time
      3. 8.3.3 Quick Output Discharge
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Capacitor (Optional)
      2. 9.1.2 Output Capacitor (Optional)
      3. 9.1.3 VIN and VBIAS Voltage Range
      4. 9.1.4 Safe Operating Area (SOA)
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inrush Current
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

For best performance, all traces must be as short as possible. To be most effective, the input and output capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance.

The maximum IC junction temperature must be restricted to 125°C under normal operating conditions. To calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use Equation 5 as a guideline:

Equation 5. TPS22967 eq2_lvsbh4.gif

where

  • PD(max) = maximum allowable power dissipation.
  • TJ(max) = maximum allowable junction temperature (125°C for the TPS22967).
  • TA = ambient temperature of the device.
  • ΘJA = junction to air thermal impedance. See Thermal Information. This parameter is highly dependent upon board layout.

Figure 36 shows an example of a layout. Notice the thermal vias under the exposed thermal pad of the device. This allows for thermal diffusion away from the device.

11.2 Layout Example

TPS22967 layout_lvsbj0.pngFigure 36. Layout Example