SLVSH34A September   2023  – November 2023 TPS22999

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics (VBIAS = 5.5 V)
    6. 5.6  Electrical Characteristics (VBIAS = 3.4 V)
    7. 5.7  Electrical Characteristics (VBIAS = 2.3 V)
    8. 5.8  Switching Characteristics
    9. 5.9  Timing Diagrams
    10. 5.10 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 ON and OFF Control
      2. 6.3.2 Regulated Inrush Current
      3. 6.3.3 Integrated Quick Output Discharge
      4. 6.3.4 Thermal Shutdown
      5. 6.3.5 Power-Good (PG) Signal
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1.     44

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YCH|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) (2) TPS22999 UNIT
YCH (DSBGA)
8 PINS
RθJA Junction-to-ambient thermal resistance 121.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 1 °C/W
RθJB Junction-to-board thermal resistance 34.2 °C/W
ΨJT Junction-to-top characterization parameter 0.4 °C/W
YJB Junction-to-board characterization parameter 34.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
The thermal parameters are based on a 4-layer PCB according to the JESD51-5 and JESD51-7 standards.