SLVSGT9A February   2023  – September 2023 TPS25948

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Electrical Characteristics
    5. 7.5 Timing Requirements
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 8.3.2 Overvoltage Lockout (OVLO)
      3. 8.3.3 Inrush Current, Overcurrent, and Short Circuit Protection
        1. 8.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.3.2 Active Current Limiting
        3. 8.3.3.3 Short-Circuit Protection
      4. 8.3.4 Analog Load Current Monitor
      5. 8.3.5 Reverse Current Protection
      6. 8.3.6 Overtemperature Protection (OTP)
      7. 8.3.7 Fault Response and Indication (FLT)
      8. 8.3.8 Supply Good Indication (SPLYGD/SPLYGD)
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single Device, Self-Controlled
    3. 9.3 Typical Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Setting Overvoltage Threshold
        2. 9.3.2.2 Setting Output Voltage Rise Time (tR)
        3. 9.3.2.3 Setting Overcurrent Threshold (ILIM)
        4. 9.3.2.4 Setting Overcurrent Blanking Interval (tITIMER)
      3. 9.3.3 Application Curves
    4. 9.4 Active ORing
    5. 9.5 Priority Power MUXing
    6. 9.6 Parallel Operation
    7. 9.7 USB PD Port Protection
    8. 9.8 Power Supply Recommendations
      1. 9.8.1 Transient Protection
      2. 9.8.2 Output Short-Circuit Measurements
    9. 9.9 Layout
      1. 9.9.1 Layout Guidelines
      2. 9.9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS25948xx family of eFuses is a highly integrated, circuit-protection and power-management solution in a small package. The devices provide multiple protection modes that use few external components and are a robust defense against overloads, short-circuits, voltage surges, reverse polarity, and excessive inrush current. With integrated back-to-back FETs, reverse current flow from output to input is blocked at all times, making the devices well suited for power MUX and ORing applications, as well as systems that need load side energy hold up storage if input power supply fails. The devices use a linear ORing based scheme to ensure almost zero DC reverse current and emulate ideal diode behavior with minimum forward voltage drop and power dissipation. The devices also provide an external pin control option to disable the reverse current blocking and allow bi-directional power delivery in steady-state.

Output slew rate and inrush current can be adjusted using a single external capacitor. Loads are protected from input overvoltage conditions by cutting off the output if input exceeds an adjustable overvoltage threshold. The devices respond to output overload by actively limiting the current. The output current limit threshold as well as the transient overcurrent blanking timer are user adjustable. The current limit control pin also functions as an analog load current monitor.

The devices are available in a 2.4-mm × 1.7-mm, 12-ball power wafer chip scale package (PowerWCSP) for improved thermal performance and reduced system footprint.

The devices are characterized for operation over a junction temperature range of –40°C to +125°C.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
TPS25948xxYWP YWP (PWCSP, 12) 2.43 mm × 1.71 mm
(1) For all available variants, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-20230914-SS0I-BLZL-KBJ6-78JHMQRL07ZC-low.svg Simplified Schematic