SLUS658D July   2005  – June 2019 TPS40190

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Dissipation Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internally Fixed Parameters
      2. 7.3.2 Output Short Circuit Protection
      3. 7.3.3 Enable Functionality
      4. 7.3.4 5-V Regulator
      5. 7.3.5 Startup Sequence and Timing
      6. 7.3.6 Prebias Outputs
  8. 8 Application and Implementation
    1. 8.1 Typical Applications
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Community Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRC|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.2 Dissipation Ratings

PACKAGE RθJA High-K Board(1)
(°C/W)		 RθJC(2)
(°C/W)
DRC 47.9 14.1
(1) The JEDEC High-K (2s2p) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), multilayer board with one-ounce internal power and ground planes and two-ounce copper traces on top and bottom of the board.
(2) The junction-to-case impedance is measured from the die to the thermal pad on the device package.