SLVSCQ5A December   2014  – February 2015 TPS62184

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable / Shutdown (EN)
      2. 8.3.2 Soft Start / Tracking (SS/TR)
      3. 8.3.3 Power Good (PG)
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode (PSM) Operation
      3. 8.4.3 Minimum Duty Cycle and 100% Mode Operation
      4. 8.4.4 Automatic Efficiency Enhancement (AEE)
      5. 8.4.5 Phase-Shifted Operation
      6. 8.4.6 Current Limit, Current Balancing, and Short Circuit Protection
      7. 8.4.7 Tracking
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical TPS62184 Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Programming the Output Voltage
          2. 9.2.1.2.2 Output Filter Selection
          3. 9.2.1.2.3 Inductor Selection
          4. 9.2.1.2.4 Output Capacitor Selection
          5. 9.2.1.2.5 Input Capacitor Selection
          6. 9.2.1.2.6 Soft Start Capacitor Selection
          7. 9.2.1.2.7 Using the Accurate EN Threshold
        3. 9.2.1.3 Application Performance Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB layout
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TPS62184 is a switched mode step-down converter, able to convert a 4-V to 17-V input voltage into a 0.9-V to 3.5-V output voltage, providing up to 6 A. It needs a minimum amount of external components. Apart from the LC output filter and the input capacitors only an optional pull-up resistor for Power Good (PG) and a small capacitor for adjustable soft start are used. To adjust the output voltage, an resistive divider is needed.

9.2 Typical Applications

9.2.1 Typical TPS62184 Application

TPS62184 SLVSCQ5_typapp_example.gifFigure 8. Typical 4-V to 17-V Input, 0.9-V Output Converter

9.2.1.1 Design Requirements

The design guideline provides a component selection to operate the device within the recommended operating conditions. The component selection is given as follows:

Table 1. Components Used for Application Characteristics

REFERENCE NAME DESCRIPTION / VALUE MANUFACTURER(1)
TPS62184YZF 2 phase step down converter, 2 x 3 mm WCSP Texas Instruments
L1, L2 Inductor XFL4020-102ME, 1 µH ±20%, 4 x 4 x 2.1 mm Coilcraft
CIN Ceramic capacitor GRM21BR61E226ME44, 2 x 22 µF, 25 V, X5R, 0805 muRata
COUT Ceramic capacitor GRM21BR60J476ME15, 4 x 47 µF, 6.3 V, X5R, 0805 muRata
CSS Ceramic capacitor, 3.3 nF Standard
R1 Chip resistor, value depending on VOUT Standard
R2 Chip resistor, value depending on VOUT Standard
R3 Chip resistor, 470 kΩ, 0603, 1/16 W, 1% Standard

9.2.1.2 Detailed Design Procedure

9.2.1.2.1 Programming the Output Voltage

The output voltage of the TPS62184 is programmed using an external resistive divider. While the voltage at the FB pin is regulated to 0.8 V, the output voltage range is specified from 0.9 up to 3.5 V. The value of the output voltage is set by selection of the resistive divider (from VOUT to FB to AGND) from Equation 9.

Equation 9. TPS62184 SLVSBB8_eqvout.gif

The current through those resistors contributes to the light load efficiency, which makes larger resistor values beneficial. However, to get sufficient noise immunity a minimum current of 5 µA is recommended. Using this, the resistor values are calculated by converting Equation 9 as follows:

Equation 10. TPS62184 SLVSBB8_eqvoutR2.gif

Inserting the R2 value in Equation 11, R1 can be obtained.

Equation 11. TPS62184 SLVSBB8_eqvoutR1.gif

Calculating for VOUT = 1.0 V gives R1 = 40 kΩ and R2=160 kΩ.

In case the FB pin gets opened or an over voltage appears at the output, an internal clamp limits the output voltage to about 7.4 V.

9.2.1.2.2 Output Filter Selection

Since the TPS62184 is compensated internally, it is optimized for a range of external component values, which is specified below. Table 2 and Table 3 are used to simplify the output filter component selection.

Table 2. Recommended LC Output Filter Combinations for VOUT ≥ 1.8 V(1)

2 x 47 µF 4 x 47 µF 6 x 47 µF 8 x 47 µF
0.47 µH
1.0 µH √ √ √ √
1.5 µH
(1) The values in the table are the nominal values of inductors and ceramic capacitors. The effective capacitance can vary by +20 and –60%.

Table 3. Recommended LC Output Filter Combinations for VOUT < 1.8 V(1)

2 x 47 µF 4 x 47 µF 6 x 47 µF 8 x 47 µF
0.68 µH
1.0 µH √ √
1.5 µH
(1) The values in the table are nominal values of inductors and ceramic capacitors. The effective capacitance can vary by +20 and -40%.

For the output capacitors, a voltage rating of 6.3 V and an X5R dielectric are chosen. If space allows for higher voltage rated capacitors in larger case sizes, the dc bias effect is lowered and the effective capacitance value increases.

9.2.1.2.3 Inductor Selection

The TPS62184 is designed to work with two inductors of 1 µH nominal. Inductors have to be selected for adequate saturation current and a low dc resistance (DCR). The minimum inductor current rating IL(min) that is needed under static load conditions is calculated using Equation 12 and Equation 13. A current imbalance of 10% at most is incorporated.

Equation 12. TPS62184 SLVSBB8_eqilmax.gif

Equation 13. TPS62184 SLVSBB8_eqiripplemax.gif

This calculation gives the minimum saturation current of the inductor needed and an additional margin of about 20% is recommended to cover dynamic overshoot due to load transients. The maximum current limit can be reached during strong load transient or overload condition. To avoid device over stress due to inductor saturation in this case, the inductor rating must be as high as the max. current limit of 5A.

For low profile solutions, the physical inductor size and the power losses have to be traded off. Smallest solution size (for example with chip inductors) are less efficient than bigger inductors with lower losses due to lower DCR and/or core losses. The following inductors have been tested with the TPS62184:

Table 4. List of Inductors

TYPE INDUCTANCE [µH] CURRENT RATING MIN/TYP [A] (1) DCR MAX [mΩ] DIMENSIONS (LxBxH) [mm] MANUFACTURER(2)
DFE252012P-1R0M 1 ±20% 4.3/4.8 42 2.5 x 2.0 x 1.2 TOKO
PIFE32251B-1R0MS 1 ±20% 4.2/4.7 42 3.2 x 2.5 x 1.2 CYNTEC
PIME031B-1R0MS 1 ±20% 4.5/5.4 55 3.7 x 3.3 x 1.2 CYNTEC
IHLP1212AB-11 1 ±20% /5.0 37.5 3.6 x 3.0 x 1.2 VISHAY
IHLP1212AE-11 1 ±20% /5.3 33 3.6 x 3.0 x 1.5 VISHAY
744 373 24 010 1 ±20% />9 27 4.0 x 4.5 x 1.8 WUERTH
XAL4020-102ME_ 1 ±20% /8.7 14.6 4.0 x 4.0 x 2.1 COILCRAFT
(1) ISAT at 30% drop of inductance (ΔIL/IL).

The TPS62184 is not designed to operate with only one inductor.

9.2.1.2.4 Output Capacitor Selection

The TPS62184 provides an output voltage range of 0.9 V to 3.5 V. While stability is a critical criteria for the output filter selection, the output capacitor value also determines transient response behavior, ripple and accuracy of VOUT. Table 5 gives recommendations to achieve various transient design targets using 1-µH inductors and small sized output capacitors (see Table 1).

Table 5. Recommended Output Capacitor Values

OUTPUT VOLTAGE [V] LOAD STEP [A] (NOMINAL) CAPACITOR VALUE(1) TYPICAL TRANSIENT RESPONSE ACCURACY
±mV ±%
0.9(2) 2-6-2(3) 4 x 47 µF 90 10
6 x 47 µF 70 8
1.8 2-6-2(3) 2 x 47 µF 150 8
4 x 47 µF 120 7
8 x 47 µF 90 5
3.3 2-6-2(3) 2 x 47 µF 170 5
4 x 47 µF 135 4
8 x 47 µF 100 3
(1) Ceramic capacitors have a dc bias effect where the effective capacitance differs significantly from the nominal value, depending on package size, voltage rating and dielectric material.
(2) For output voltages < 1.8V an additional feedforward capacitor of 82pF, parallel to R1 is recommended to increase stability margin at heavy load steps.
(3) The transient load step is tested with 1-µs/step rising/falling slopes.

The architecture of the TPS62184 allows the use of tiny ceramic output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low resistance up to high frequencies and to get narrow capacitance variation with temperature, it is recommended to use X7R or X5R dielectrics. Using even higher values than demanded for stability and transient response has further advantages like smaller voltage ripple and tighter dc output accuracy in Power Save Mode.

9.2.1.2.5 Input Capacitor Selection

The input current of a buck converter is pulsating. Therefore, a low ESR input capacitor is required to prevent large voltage transients and provide peak currents. The recommended value for most applications is 2 x 22 µF, split between the VIN1 and VIN2 inputs and placed as close as possible to these pins and PGND pins. If additional capacitance is needed, it can be added as bulk capacitance. To ensure proper operation, the effective capacitance at the VIN pins must not fall below 2 x 2 µF (close) + 10 µF bulk (effective capacitances).

Low ESR multilayer ceramic capacitors are recommended for best filtering. Increasing with input voltage, the dc bias effect reduces the nominal capacitance value significantly. To decrease input ripple current further, larger values of input capacitors can be used.

9.2.1.2.6 Soft Start Capacitor Selection

The TPS62184 provides a user programmable soft start time. A constant current source of 5 µA, internally connected to the SS/TR pin, allows control of the startup slope by connecting a capacitor to this pin. The current source charges the capacitor and the soft start time is given by:

Equation 14. TPS62184 SLVSBB8_eqssramp.gif

where CSS is the soft-start capacitance required at the SS/TR pin and tss is the resulting soft-start ramp time.

The SS/TR pin should not be left floating and a minimum capacitance of 220 pF is recommended. Using Equation 14, and inserting tSS = 750 µs, a value of 3 nF is calculated. 3.3 nF is chosen as a standard value for this example.

9.2.1.2.7 Using the Accurate EN Threshold

The TPS62184 provides a very accurate EN threshold voltage. This can be used to switch on the device according to a VIN or another voltage level by using a resistive divider as shown below. The values of REN1 and REN2, needed to set EN = High at a specific VIN can be calculated according to Kirchhoff's laws, shown in Equation 15 and used in the following example:

Equation 15. TPS62184 SLVSBB8_eqEN.gif

TPS62184 SLVSBB8_EN.gifFigure 9. Resistive Divider for Controlled EN Threshold

For a typical 8-V input rail, the device turn on target value is set to 5.5 V. The current through the resistive divider is set to 10 µA, which indicates a total resistance of about 800 kΩ. Appropriate standard resistor values, fitting Equation 15, are REN1 = 680 kΩ and REN2 = 150 kΩ. As a result, the device switches on, when VIN has reached 5.5 V and the current through the divider is 9.6 µA. The device switches off at a threshold of 0.9 V. Using Equation 15 again, this case gives a level of VIN = 5.0 V.

Figure 30 to Figure 33 show thresholds and appropriate device behavior with a startup time of about 800 µs.

9.2.1.3 Application Performance Curves

VIN = 12 V, VOUT = 3.3 V, TA = 25°C, (unless otherwise noted)

TPS62184 SLVSCQ5_efficiency_3.3iout.gif
VOUT = 3.3V
Figure 10. Efficiency vs Load Current
TPS62184 SLVSCQ5_efficiency_1.8iout.gif
VOUT = 1.8V
Figure 12. Efficiency vs Load Current
TPS62184 SLVSCQ5_efficiency_0.9iout.gif
VOUT = 0.9V
Figure 14. Efficiency vs Load Current
TPS62184 SLVSCQ5_loadreg.gif
Figure 16. Output Voltage vs Output Current (Load regulation)
TPS62184 SLVSBCQ5_IOUTmax_0.9V.gif
VOUT = 0.9V
Figure 18. Maximum Output Current vs Input Voltage
TPS62184 SLVSCQ5_stuplow.gif
VOUT = 0.9V
Figure 20. Startup into 10 Ω (90 mA)
TPS62184 SLVSCQ5_stuphigh.gif
VOUT = 0.9V
Figure 22. Startup into 0.135 Ω (6.6 A)
TPS62184 SLVSCQ5_PWMtyp.gif
IOUT = 3 A VOUT = 0.9V
Figure 24. Typical Operation (PWM)
TPS62184 SLVSCQ5_loadtran_0-4.gif
COUT = 6 x 47 µF VOUT = 0.9V
Figure 26. Load Transient Response (PSM-PWM)
TPS62184 SLVSCQ5_short_long.gif
VOUT = 0.9V
Figure 28. HICCUP at Short Circuit
TPS62184 SLVSBB8_ENrisefall.gif
VIN = 5.5 V (Rising), VIN = 5.0 V (Falling)
Figure 30. Accurate EN Threshold
TPS62184 SLVSBB8_ENrise.gif
VIN = 5.5 V (Rising)
Figure 32. Accurate EN Threshold
TPS62184 SLVSCQ5_efficiency_3.3vin.gif
VOUT = 3.3V
Figure 11. Efficiency vs Input Voltage
TPS62184 SLVSCQ5_efficiency_1.8vin.gif
VOUT = 1.8V
Figure 13. Efficiency vs Input Voltage
TPS62184 SLVSCQ5_efficiency_0.9vin.gif
VOUT = 0.9V
Figure 15. Efficiency vs Input Voltage
TPS62184 SLVSCQ5_linereg.gif
Figure 17. Output Voltage vs Input Voltage (Line regulation)
TPS62184 SLVSBB8_fswtyp.gif
VOUT = 3.3V
Figure 19. Switching Frequency vs Output Voltage
TPS62184 SLVSCQ5_stupmed.gif
VOUT = 0.9V
Figure 21. Startup into 0.33 Ω (2.73 A)
TPS62184 SLVSCQ5_discharge.gif
VOUT = 0.9V
Figure 23. Output Discharge (No load)
TPS62184 SLVSCQ5_PSMtyp.gif
IOUT = 50 mA VOUT = 0.9V
Figure 25. Typical Operation (PSM)
TPS62184 SLVSCQ5_loadtran_2-5.gif
COUT = 6 x 47 µF VOUT = 0.9V
Figure 27. Load Transient Response (PWM-PWM)
TPS62184 SLVSCQ5_short_short.gif
VOUT = 0.9V
Figure 29. HICCUP at Short Circuit
TPS62184 SLVSBB8_ENthreshold.gif
Figure 31. Accurate EN Threshold Showing VOUT
TPS62184 SLVSBB8_ENfall.gif
VIN = 5.0 V (Falling)
Figure 33. Accurate EN Threshold

9.3 System Examples

Based on Figure 8, the schematics shown in Figure 34 through Figure 38 show different output voltage divider values to get different VOUT. Another design target is to have about 5-µA current through the divider.

The values for the voltage divider are derived using the procedure given in Programming the Output Voltage. While Equation 10 and Equation 11 are used to calculate R2 and R1, the values are aligned with standard resistor values.

TPS62184 SLVSCQ5_typapp_1.0V.gifFigure 34. 1.0-V/6-A Power Supply

TPS62184 SLVSCQ5_typapp_1.2V.gifFigure 35. 1.2-V/6-A Power Supply

TPS62184 SLVSCQ5_typapp_1.8V.gifFigure 36. 1.8-V/6-A Power Supply

TPS62184 SLVSCQ5_typapp_2.5V.gifFigure 37. 2.5-V/6-A Power Supply

TPS62184 SLVSCQ5_typapp_3.3V.gifFigure 38. 3.3-V/6-A Power Supply