SGLS303F May   2005  – April 2016 TPS732-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Transient Response
      5. 7.3.5 Reverse Current
      6. 7.3.6 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Output Noise
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
    4. 10.4 Package Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DBV Package
5-Pin SOT-23
Top View
DRB Package
8-Pin VSON With Exposed Thermal Pad
Top View
NC: No internal connection

Pin Functions

PIN TYPE DESCRIPTION
NAME NO.
SOT-23 VSON
EN 3 5 I Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. See Shutdown for more details. EN can be connected to IN if not used.
FB(2) 4 3 I Input to the control loop error amplifier, and is used to set the output voltage of the device.
GND 2 4 — Ground
IN 1 8 I Unregulated input supply
NR(1) 4 3 — Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This allows output noise to be reduced to low levels.
OUT 5 1 O Output of the regulator. There are no output capacitor requirements for stability.
Pad — Pad — Ground
NC — 2, 6, 7 — No internal connection
(1) Fixed voltage versions only.
(2) Adjustable voltage versions only.