SBVS425A december   2022  – may 2023 TPS748A-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: IOUT = 50 mA
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Shutdown
      2. 7.3.2 Active Discharge
      3. 7.3.3 Power-Good Output (PG)
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Thermal Shutdown Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input, Output, and Bias Capacitor Requirements
      2. 8.1.2 Dropout Voltage
      3. 8.1.3 Output Noise
      4. 8.1.4 Estimating Junction Temperature
      5. 8.1.5 Soft Start, Sequencing, and Inrush Current
      6. 8.1.6 Power-Good Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) TPS748A-Q1 UNIT
DRC (VSON)
10 PINS
RθJA Junction-to-ambient thermal resistance 47.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 63.7 °C/W
RθJB Junction-to-board thermal resistance 19.5 °C/W
ψJT Junction-to-top characterization parameter 4.2 °C/W
ψJB Junction-to-board characterization parameter 19.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.3 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report.