SGLS118D December   2001  – September 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Regulator Protection
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Capacitor Requirements
        2. 9.2.2.2 Output Voltage Programming
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation and Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

For the LDO power supply, especially these high voltage and large current ones, layout is an important step. If layout is not carefully designed, the regulator could not deliver enough output current because of the thermal limitation. To improve the thermal performance of the device, and maximize the current output at high ambient temperature, it is recommended to spread the GND as large as possible and put enough thermal vias on the thermal pad. Figure 27 shows an example layout.

11.2 Layout Example

TPS76901-Q1 TPS76912-Q1 TPS76915-Q1 TPS76918-Q1 TPS76925-Q1 TPS76927-Q1 TPS76928-Q1 TPS76930-Q1 TPS76933-Q1 TPS76950-Q1 layout_SGLS118.gif Figure 27. Layout Recommendation

11.3 Power Dissipation and Junction Temperature

Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature must be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max).

The maximum-power-dissipation limit is determined using Equation 3.

Equation 3. TPS76901-Q1 TPS76912-Q1 TPS76915-Q1 TPS76918-Q1 TPS76925-Q1 TPS76927-Q1 TPS76928-Q1 TPS76930-Q1 TPS76933-Q1 TPS76950-Q1 EQ_3.gif

where

  • TJmax is the maximum allowable junction temperature
  • RθJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.
  • TA is the ambient temperature.

The regulator dissipation is calculated using Equation 4.

Equation 4. TPS76901-Q1 TPS76912-Q1 TPS76915-Q1 TPS76918-Q1 TPS76925-Q1 TPS76927-Q1 TPS76928-Q1 TPS76930-Q1 TPS76933-Q1 TPS76950-Q1 EQ_4.gif

Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection circuit.