SBVS437B December   2022  – February 2024 TPS7A21-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Smart Enable (EN)
      2. 6.3.2 Low Output Noise
      3. 6.3.3 Active Discharge
      4. 6.3.4 Dropout Voltage
      5. 6.3.5 Foldback Current Limit
      6. 6.3.6 Undervoltage Lockout
      7. 6.3.7 Thermal Overload Protection (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Applications and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Load Transient Response
      4. 7.1.4 Undervoltage Lockout (UVLO) Operation
      5. 7.1.5 Power Dissipation (PD)
      6. 7.1.6 Estimating Junction Temperature
      7. 7.1.7 Recommended Area For Continuous Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Power Dissipation and Device Operation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Thermal Information

THERMAL METRIC(1) TPS7A21-Q1 UNIT
DRB
(VSON)		 DSG
(WSON)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 58.9 77.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 76.3 109.0 °C/W
RθJB Junction-to-board thermal resistance 31.8 44.5 °C/W
ψJT Junction-to-top characterization parameter 6.3 7.2 °C/W
ψJB Junction-to-board characterization parameter 31.8 44.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 13.3 17.0 °C/W
(1) For more information about traditional and new thermal metrics, see the  Semiconductor and IC Package Thermal Metrics and An empirical analysis of the impact of board layout on LDO thermal performance  application notes.