SLASE37A May   2014  – December 2014 TRF37A32 , TRF37B32 , TRF37C32

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics, TRF37A32
    6. 7.6  Electrical Characteristics, TRF37B32
    7. 7.7  Electrical Characteristics, TRF37C32
    8. 7.8  Timing Requirements
    9. 7.9  Typical Characteristics (TRF37A32)
    10. 7.10 Typical Characteristics (TRF37B32)
    11. 7.11 Typical Characteristics (TRF37C32)
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low Power Mode
      2. 8.3.2 Power Down
      3. 8.3.3 Single Ended RF Input
      4. 8.3.4 Single Ended LO Input
      5. 8.3.5 IF Amplifier
    4. 8.4 Device Functional Modes
      1. 8.4.1 Low Power Mode
      2. 8.4.2 Single Channel and Shutdown Modes
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Level
        2. 9.2.2.2 Matching
        3. 9.2.2.3 RF Input Component Selection
        4. 9.2.2.4 IF Output Component Selection
        5. 9.2.2.5 Frequency Planning
        6. 9.2.2.6 Control Terminal Transients
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Up Sequence
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

Good layout practice helps to enable excellent linearity and isolation performance. An example of good layout is shown in Figure 78. In the example, only the top signal layer and its adjacent ground reference plane are shown. Some recommended layout principles include the following:

  • Excellent electrical connection from the PowerPAD™ to the board ground is essential. Use the recommended footprint, solder the pad to the board, and do not include solder mask under the pad
  • Connect pad ground to device terminal ground on the top board layer.
  • Verify that the return current path follows the primary current path by including topside terminal to pour ground connection and vias close to any reference layer transition.
  • Do not route signal lines over breaks in the reference plane.
  • Maintain symmetry as much as possible between lines in a differential pair. Match electrical lengths.
  • Avoid routing clocks and digital control lines near signal lines.
  • Do not route signal lines over noisy power planes. Ground is the best reference, although clean power planes can serve where necessary.
  • Place supply decoupling close to the device.
  • Keep channels physically separated to improve isolation.

11.2 Layout Example

L1_TopLayer_slase37.pngFigure 78.