SLOS787J May   2012  – March 2020 TRF7964A

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Device Characteristics
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram
    2. 4.2 Signal Descriptions
      1. Table 4-1 Terminal Functions
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Thermal Resistance Characteristics
    6. 5.6 Switching Characteristics
  6. 6Detailed Description
    1. 6.1  Overview
      1. 6.1.1 RFID – Reader and Writer
    2. 6.2  System Block Diagram
    3. 6.3  Power Supplies
      1. 6.3.1 Supply Arrangements
      2. 6.3.2 Supply Regulator Settings
      3. 6.3.3 Power Modes
    4. 6.4  Receiver – Analog Section
      1. 6.4.1 Main and Auxiliary Receivers
      2. 6.4.2 Receiver Gain and Filter Stages
    5. 6.5  Receiver – Digital Section
      1. 6.5.1 Received Signal Strength Indicator (RSSI)
        1. 6.5.1.1 Internal RSSI – Main and Auxiliary Receivers
        2. 6.5.1.2 External RSSI
    6. 6.6  Oscillator Section
    7. 6.7  Transmitter – Analog Section
    8. 6.8  Transmitter – Digital Section
    9. 6.9  Transmitter – External Power Amplifier and Subcarrier Detector
    10. 6.10 TRF7964A IC Communication Interface
      1. 6.10.1 General Introduction
        1. 6.10.1.1 Continuous Address Mode
        2. 6.10.1.2 Noncontinuous Address Mode (Single Address Mode)
        3. 6.10.1.3 Direct Command Mode
        4. 6.10.1.4 FIFO Operation
      2. 6.10.2 Parallel Interface Mode
      3. 6.10.3 Reception of Air Interface Data
      4. 6.10.4 Data Transmission From MCU to TRF7964A
      5. 6.10.5 Serial Interface Communication (SPI)
        1. 6.10.5.1 Serial Interface Mode With Slave Select (SS)
      6. 6.10.6 Direct Mode
    11. 6.11 TRF7964A Initialization
    12. 6.12 Special Direct Mode for Improved MIFARE Compatibility
    13. 6.13 Direct Commands from MCU to Reader
      1. 6.13.1 Command Codes
        1. 6.13.1.1  Idle (0x00)
        2. 6.13.1.2  Software Initialization (0x03)
        3. 6.13.1.3  Reset FIFO (0x0F)
        4. 6.13.1.4  Transmission With CRC (0x11)
        5. 6.13.1.5  Transmission Without CRC (0x10)
        6. 6.13.1.6  Delayed Transmission With CRC (0x13)
        7. 6.13.1.7  Delayed Transmission Without CRC (0x12)
        8. 6.13.1.8  Transmit Next Time Slot (0x14)
        9. 6.13.1.9  Block Receiver (0x16)
        10. 6.13.1.10 Enable Receiver (0x17)
        11. 6.13.1.11 Test Internal RF (RSSI at RX Input With TX ON) (0x18)
        12. 6.13.1.12 Test External RF (RSSI at RX Input with TX OFF) (0x19)
    14. 6.14 Register Description
      1. 6.14.1 Register Preset
      2. 6.14.2 Register Overview
      3. 6.14.3 Detailed Register Description
        1. 6.14.3.1 Main Configuration Registers
          1. 6.14.3.1.1 Chip Status Control Register (0x00)
          2. 6.14.3.1.2 ISO Control Register (0x01)
        2. 6.14.3.2 Control Registers – Sublevel Configuration Registers
          1. 6.14.3.2.1  ISO/IEC 14443 TX Options Register (0x02)
          2. 6.14.3.2.2  ISO/IEC 14443 High-Bit-Rate and Parity Options Register (0x03)
          3. 6.14.3.2.3  TX Timer High Byte Control Register (0x04)
          4. 6.14.3.2.4  TX Timer Low Byte Control Register (0x05)
          5. 6.14.3.2.5  TX Pulse Length Control Register (0x06)
          6. 6.14.3.2.6  RX No Response Wait Time Register (0x07)
          7. 6.14.3.2.7  RX Wait Time Register (0x08)
          8. 6.14.3.2.8  Modulator and SYS_CLK Control Register (0x09)
          9. 6.14.3.2.9  RX Special Setting Register (0x0A)
          10. 6.14.3.2.10 Regulator and I/O Control Register (0x0B)
        3. 6.14.3.3 Status Registers
          1. 6.14.3.3.1 IRQ Status Register (0x0C)
          2. 6.14.3.3.2 Interrupt Mask Register (0x0D) and Collision Position Register (0x0E)
          3. 6.14.3.3.3 RSSI Levels and Oscillator Status Register (0x0F)
          4. 6.14.3.3.4 Special Functions Register (0x10)
          5. 6.14.3.3.5 Special Functions Register (0x11)
          6. 6.14.3.3.6 Adjustable FIFO IRQ Levels Register (0x14)
        4. 6.14.3.4 Test Registers
          1. 6.14.3.4.1 Test Register (0x1A)
          2. 6.14.3.4.2 Test Register (0x1B)
        5. 6.14.3.5 FIFO Control Registers
          1. 6.14.3.5.1 FIFO Status Register (0x1C)
          2. 6.14.3.5.2 TX Length Byte1 Register (0x1D), TX Length Byte2 Register (0x1E)
  7. 7Applications, Implementation, and Layout
    1. 7.1 TRF7964A Reader System Using SPI With SS Mode
      1. 7.1.1 General Application Considerations
      2. 7.1.2 Schematic
    2. 7.2 Layout Considerations
    3. 7.3 Impedance Matching TX_Out (Pin 5) to 50 Ω
    4. 7.4 Reader Antenna Design Guidelines
  8. 8Device and Documentation Support
    1. 8.1 Getting Started and Next Steps
    2. 8.2 Device Nomenclature
    3. 8.3 Tools and Software
    4. 8.4 Documentation Support
    5. 8.5 Support Resources
    6. 8.6 Trademarks
    7. 8.7 Electrostatic Discharge Caution
    8. 8.8 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.14.3.1.2 ISO Control Register (0x01)

Table 6-21 describes the ISO Control register.

Table 6-21 ISO Control Register (0x01)

Function: Controls the selection of ISO standard protocol, direct mode and receive CRC
Default: 0x02 (ISO/IEC 15693 high bit rate, one subcarrier, 1 out of 4); it is preset at EN = L or POR = H
Bit Name Function Description
B7 rx_crc_n CRC Receive selection 0 = RX CRC (CRC is present in the response)
1 = no RX CRC (CRC is not present in the response)(1)
B6 dir_mode Direct mode type selection 0 = Direct Mode 0
1 = Direct mode 1
B5 rfid RFID / Reserved 0 = RFID mode
1 = Reserved (should be set to 0)
B4 iso_4 RFID

RFID: See Table 6-22 for B0:B4 settings based on ISO protocol in application
B3 iso_3 RFID

RFID: See Table 6-22 for B0:B4 settings based on ISO protocol in application
B2 iso_2 RFID

RFID: See Table 6-22 for B0:B4 settings based on ISO protocol in application
B1 iso_1 RFID

RFID: See Table 6-22 for B0:B4 settings based on ISO protocol in application
B0 iso_0 RFID

RFID: See Table 6-22 for B0:B4 settings based on ISO protocol in application
(1) Only applicable to ISO/IEC 14443 A and ISO/IEC 15693

Table 6-22 ISO Control Register ISO_x Settings, RFID Mode

ISO_4 ISO_3 ISO_2 ISO_1 ISO_0 PROTOCOL REMARKS
0 0 0 0 0 ISO/IEC 15693 low bit rate, 6.62 kbps, one subcarrier, 1 out of 4
0 0 0 0 1 ISO/IEC 15693 low bit rate, 6.62 kbps, one subcarrier, 1 out of 256
0 0 0 1 0 ISO/IEC 15693 high bit rate, 26.48 kbps, one subcarrier, 1 out of 4 Default for reader
0 0 0 1 1 ISO/IEC 15693 high bit rate, 26.48 kbps, one subcarrier, 1 out of 256
0 0 1 0 0 ISO/IEC 15693 low bit rate, 6.67 kbps, double subcarrier, 1 out of 4
0 0 1 0 1 ISO/IEC 15693 low bit rate, 6.67 kbps, double subcarrier, 1 out of 256
0 0 1 1 0 ISO/IEC 15693 high bit rate, 26.69 kbps, double subcarrier, 1 out of 4
0 0 1 1 1 ISO/IEC 15693 high bit rate, 26.69 kbps, double subcarrier,
1 out of 256
0 1 0 0 0 ISO/IEC 14443 A RX bit rate, 106 kbps RX bit rate (1)
0 1 0 0 1 ISO/IEC 14443 A RX high bit rate, 212 kbps
0 1 0 1 0 ISO/IEC 14443 A RX high bit rate, 424 kbps
0 1 0 1 1 ISO/IEC 14443 A RX high bit rate, 848 kbps
0 1 1 0 0 ISO/IEC 14443 B RX bit rate, 106 kbps RX bit rate (1)
0 1 1 0 1 ISO/IEC 14443 B RX high bit rate, 212 kbps
0 1 1 1 0 ISO/IEC 14443 B RX high bit rate, 424 kbps
0 1 1 1 1 ISO/IEC 14443 B RX high bit rate, 848 kbps
1 0 0 1 1 Reserved
1 0 1 0 0 Reserved
1 1 0 1 0 FeliCa 212 kbps
1 1 0 1 1 FeliCa 424 kbps
(1) For ISO/IEC 14443 A or B, when bit rate of TX is different from RX, settings can be done in register 0x02 or 0x03.