SLLSF47D February   2018  – April 2024 TUSB1044

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 USB 3.1
      2. 6.3.2 DisplayPort
      3. 6.3.3 4-Level Inputs
      4. 6.3.4 Receiver Linear Equalization
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Configuration in GPIO mode
      2. 6.4.2 Device Configuration in I2C Mode
      3. 6.4.3 DisplayPort Mode
      4. 6.4.4 Custom Alternate Mode
      5. 6.4.5 Linear EQ Configuration
      6. 6.4.6 Adjustable VOD Linear Range and DC Gain
      7. 6.4.7 USB3.1 Modes
    5. 6.5 Programming
      1. 6.5.1 Use The Following Procedure to Write to TUSB1044 I2C Registers:
      2. 6.5.2 Use The Following Procedure to Read the TUSB1044 I2C Registers:
      3. 6.5.3 Use The Following Procedure for Setting a Starting Sub-Address for I2C Reads:
    6. 6.6 Register Maps
      1. 6.6.1 TUSB1044 Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 System Examples
      1. 7.3.1 USB 3.1 only (USB/DP Alternate Mode)
      2. 7.3.2 USB3.1 and 2 lanes of DisplayPort
      3. 7.3.3 DisplayPort Only
      4. 7.3.4 USB 3.1 only (USB/Custom Alternate Mode)
      5. 7.3.5 USB3.1 and 1 Lane of Custom Alt Mode
      6. 7.3.6 USB3.1 and 2 Lane of Custom Alt Mode
      7. 7.3.7 USB3.1 and 4 Lane of Custom Alt Mode
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
USB 3.1
tIDLEEntryDelay from U0 to electrical idleRefer to Figure 5-40.16ns
tIDLEExit_U1U1 exist time: break in electrical idle to the transmission of LFPSRefer to Figure 5-40.16ns
tIDLEExit_U2U3U2/U3 exit time: break in electrical idle to transmission of LFPS5µs
tRXDET_INTVLRX detect interval while in Disconnect12ms
tIDLEExit_DISCDisconnect Exit Time12ms
tExit_SHTDNShutdown Exit TimeCTL0 = Vcc/2 to U2U30.5ms
tDIFF_DLYDifferential Propagation DelayRefer to Figure 5-3300ps
tPWRUPACTIVETime when Vcc reaches 70% to device active1ms
tR/FOutput Rise/Fall Time20%-80% of differential voltage measured 1.7 inch from the output pin; Input signal rise/fall faster than 35ps;  Refer to Figure 5-535ps
tRF-MMOutput Rise/Fall time mismatch20%-80% of differential voltage measured 1.7 inch from the output pin2.6ps
AUXP/N and SBU1/2
tAUX_PDSwitch propagation delayRefer to Figure 5-31050ps
tAUX_SW_OFFSwitching time CTL1 to switch OFF.Refer to Figure 5-7500ns
tAUX_SW_ONSwitching time CTL1 to switch ONRefer to Figure 5-6500ns
tAUX_INTRAIntra-pair output skew100ps