SCES640J january   2007  – july 2023 TXS0102

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements: VCCA = 1.8 V ±0.15 V
    7. 6.7  Timing Requirements: VCCA = 2.5 V ± 0.2 V
    8. 6.8  Timing Requirements: VCCA = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics: VCCA = 1.8 V ± 0.15 V
    10. 6.10 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
    11. 6.11 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Input Driver Requirements
      3. 8.3.3 Output Load Considerations
      4. 8.3.4 Enable and Disable
      5. 8.3.5 Pullup or Pulldown Resistors on I/O Lines
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • No direction-control signal needed
  • Maximum data rates:
    • 24 Mbps (push pull)
    • 2 Mbps (open drain)
  • Available in the Texas Instruments NanoStar™ integrated circuit package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA ≤ VCCB)
  • VCC isolation feature: if either VCC input is at GND, both ports are in the High-Impedance state
  • No power-supply sequencing required: either VCCA or VCCB can be ramped first
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B port:
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)