SLUSES3A October   2023  – December 2023 UCC25660

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Power Proportional Control
        1. 7.3.1.1 Voltage Feedforward
      2. 7.3.2 VCR Synthesizer
      3. 7.3.3 Feedback Chain (Control Input)
      4. 7.3.4 Adaptive Dead-Time
      5. 7.3.5 Input Voltage Sensing
        1. 7.3.5.1 Brown in and Brown out Tresholds and Options
        2. 7.3.5.2 Output OVP and External OTP
      6. 7.3.6 Resonant Tank Current Sensing
    4. 7.4 Protections
      1. 7.4.1 Zero Current Switching (ZCS) Protection
      2. 7.4.2 Minimum Current Turn-off During Soft Start
      3. 7.4.3 Cycle by Cycle Current Limit and Short Circuit Protection
      4. 7.4.4 Overload (OLP) Protection
      5. 7.4.5 VCC OVP Protection
    5. 7.5 Device Functional Modes
      1. 7.5.1 Startup
        1. 7.5.1.1 With HV Startup
        2. 7.5.1.2 Without HV Startup
      2. 7.5.2 Soft Start Ramp
        1. 7.5.2.1 Startup Transition to Regulation
      3. 7.5.3 Light Load Management
        1. 7.5.3.1 Operating Modes (Burst Pattern)
        2. 7.5.3.2 Mode Transition Management
        3. 7.5.3.3 Burst Mode Threshold Programming
        4. 7.5.3.4 PFC On/Off
      4. 7.5.4 X-Capacitor Discharge
        1. 7.5.4.1 Detecting Through HV Pin Only
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  LLC Power Stage Requirements
        2. 8.2.2.2  LLC Gain Range
        3. 8.2.2.3  Select Ln and Qe
        4. 8.2.2.4  Determine Equivalent Load Resistance
        5. 8.2.2.5  Determine Component Parameters for LLC Resonant Circuit
        6. 8.2.2.6  LLC Primary-Side Currents
        7. 8.2.2.7  LLC Secondary-Side Currents
        8. 8.2.2.8  LLC Transformer
        9. 8.2.2.9  LLC Resonant Inductor
        10. 8.2.2.10 LLC Resonant Capacitor
        11. 8.2.2.11 LLC Primary-Side MOSFETs
        12. 8.2.2.12 Design Considerations for Adaptive Dead-Time
        13. 8.2.2.13 LLC Rectifier Diodes
        14. 8.2.2.14 LLC Output Capacitors
        15. 8.2.2.15 HV Pin Series Resistors
        16. 8.2.2.16 BLK Pin Voltage Divider
        17. 8.2.2.17 ISNS Pin Differentiator
        18. 8.2.2.18 TSET Pin
        19. 8.2.2.19 OVP/OTP Pin
        20. 8.2.2.20 Burst Mode Programming
        21. 8.2.2.21 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 VCCP Pin Capacitor
      2. 8.3.2 Boot Capacitor
      3. 8.3.3 V5P Pin Capacitor
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
        1. 8.4.2.1 Schematics
        2. 8.4.2.2 Schematics
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

All voltages are with respect to GND, -40°C< TJ =TA < 125°C, VCC =15 V, currents are positive into and negative out of the specified terminal, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
VCCShort Below this threshold, use reduced start up current 0.6 1 1.4 V
VCCReStartJfet Below this threshold, re-enable JFET. 10.2 V
VCCReStart HV startup is re-enabled when VCC is below this level during startup phase 12.5 13 13.5 V
VCCStartSelf Startup when VCC is above this level  13.5 14 14.5 V
VCCStartExt Startup when VCC is above this level 10.5 10.9 11.3 V
VCCStopSwitching Switching Stopped below this threshold 9 9.5 V
VCCUVLOr VCC under voltage lockout voltage (rising) 7.25 7.5 7.75 V
VCCUVLOf VCC under voltage lockout voltage hysteresis 6.5 6.8 7.1 V
VCCHold_r Jfet Stop voltage during startup programming phase 7.9 8.2 8.5 V
VCCHold_f Jfet Start voltage during startup programming phase 7.65 7.9 8.15 V
VCCShunt VCC internal clamp voltage 19 V
IVCCClamp VCC internal clamp current 15 mA
VCC_OV VCC OVP threshold  20.5 V
SUPPLY CURRENT
ICCSleep Current drawn from VCC rail during burst off period 800 µA
ICCRun Current drawn from VCC Pin while gate is switching. Excluding Gate Current Dead time = 1 µs maximum dead time 8 mA
REGULATED SUPPLY
V5P Regulated supply voltage(1)  no load 4.75 5 5.25 V
Regulated supply voltage 10 mA load 4.75 5 5.25 V
V5PUVLO V5P under voltage lock out voltage(1) 4 V
IV5PStartupCurrLimit Max current that can be drawn on the pin when VCCP< VCCStartSelf (1) 6 mA
IV5PCurrLimit V5P at IV5P =15mA (1) VCCP=15V 10.2 mA
HIGH VOLTAGE STARTUP
IVCC_Charge_Low Reduced VCCP charge current from HV Pin VHV = 20 V, VCC = 0 V   (UCC256601,UCC256602,UCC256604) 0.23 0.44 0.65 mA
IVCC_Charge_High Full VCCP charge current VHV = 20 V, VCC = 4V (UCC256601,UCC256602,UCC256604) 7.5 10 13.8 mA
IHVZCD Highest AC zero crossing detection test current  (UCC256601,UCC256604) 0.625 mA
IXCAPDischarge X-cap discharge current (UCC256601,UCC256604) 8.7 11.5 13.5 mA
Vzero-crossing HV pin voltage threshold that zero-crossing is detected (UCC256601,UCC256604) 8 9 11 V
tXCAPZCD AC zero crossing detection window length for first four test current stage (1) (UCC256601,UCC256604) 10 12 14 ms
tXCAPZCDLast AC zero crossing detection window length for final test current stage (1) (UCC256601,UCC256604) 36 ms
tXCAPIdle AC zero crossing detection idle period length (1) (UCC256601,UCC256604) 700 ms
tXCAPDischarge Time for X-cap discharge current active (1) (UCC256601,UCC256604) 360 ms
tXCAPJFETON Time of first X-cap detection after JFETON (1) (UCC256601,UCC256604) 12 ms
IXCAP_I0 X-Cap test current I0 (UCC256601,UCC256604) 125 uA
IXCAP_Idel1 X-Cap test current I1  (UCC256601,UCC256604) 125 uA
IXCAP_Idel1 X-Cap test current I1  (UCC256601,UCC256604) 250 uA
IXCAP_Idel1 X-Cap test current I1  (UCC256601,UCC256604) 375 uA
BULK VOLTAGE SENSE
VBLKStartHys BLK voltage that allows LLC to start switching (1) UCC256601 0.09 0.1 0.11 V
VBLKStop BLK voltage that forces LLC operation to stop 0.98 1 1.02 V
IBLKHys BLK hysteresis current  UCC256601 5 µA
tBLKStopDC BLK shut down duration(1) 12 14 16 uS
VBLKOVRise BLK overvoltge rising threshold UCC256602 1.65 1.7 1.75 V
VBLKOVFallHys BLK overvoltge falling hysterisis UCC256602 0.08 0.1 0.12 V
FEEDBACK PIN
RFBInternal Internal pull down resistor value  FBReplica from 4.5V to 0.5V 85 100 115 kΩ
IFB FB internal current source (Option 1) Iopto=0uA 68 80 92 µA
VFB FB pin voltage when FB pin sink current is at (IFB - 50 µA) Iopto = 0.37 *  IFB 3.3 3.5 3.7 V
ΔVFB FB pin voltage variation when FB pin sink current ranges from (Iopto = 0.37*IFB to Iopto = 0.94*IFB) 0.6 V
ΔVclamp FB pin voltage variation when FB pin sink current ranges from (Iopto = 0.94*IFB) to (Iopto = 1.06*IFB) (Iopto = 0.94*IFB) to (Iopto = 1.06*IFB) 0.3 V
IFBclamp Maximum FB internal current source when FB is clamped VFB = 0 75 87.5 100 μA
ΔVFBclamp FB pin voltage variation when FB pin sink current ranges from (IIopto = 1.06IFB) to (IIopto = IFB + 0.94*IFBClamp) (IIopto = 1.06IFB) to (IIopto = IFB + 0.94*IFBClamp) 0.5 V
f-3dB Feedback chain -3 dB cut off frequency (2) FBReplica from 4.5V to 0.5V 1 MHz
VFBOLP OLP protection(1) 4.75 V
TOLP OLP protection time (1) 100 ms
RESONANT CURRENT SENSE
VISNS_OCP OCP threshold For TSET option >2.5V (1) 3.9 4 4.1 V
VISNS_OCP OCP threshold For TSET option <2.5V  3.4 3.5 3.6 V
VISNS_OCP_SS OCP threshold during soft start 2.9 3 3.1 V
nOCP Number of OCP cycles before OCP fault is tripped (1) 7
nOCP_SS Number of OCP cycles before OCP fault is tripped at startup(2) 50
VIpolarityHyst ISNS Polarity comparator hysterisis 40 mV
VISNS_ZCS ZCS comparator +Ve threshold after Soft Start 100 mV
VISNS_ZCSn ZCS comparator -Ve threshold, after Soft Start -100 mV
VISNS_MINCURR_SS +Ve ISNS threshold during Soft Start 50 mV
VISNS_MINCURR_SSn -Ve ISNS threshold during Soft Start -50 mV
tleb Leading edge blanking for ZCS &  OCP1 comparators(1) 250 ns
TZCSFault Fault detected when ZCS event persisits for the idicated time(2) ZCS Event persists 10 ms
GATE DRIVER
VLOL LO output low voltage Isink = 20 mA 0.12 V
VRVCC - VLOH LO output high voltage Isource = 20 mA 0.3 V
VHOL - VHS HO output low voltage Isink = 20 mA 0.12 V
VHB - VHOH HO output high voltage Isource = 20 mA 0.35 V
VHB-HSUVLOFall High side gate driver UVLO falling threshold 6.6 7.25 8 V
VHB-HSUVLOHys High side gate driver UVLO threshold hysteresis 0.78 0.9 1.05 V
Isource_pk_HO HO peak source current (2) At VCCP=12V -0.6 A
Isource_pk_LO LO peak source current (2) At VCCP=12V -0.6 A
Isink_pk_HO HO peak sink current (2) At VCCP=12V 1.2 A
Isink_pk_LO LO peak sink current (2) At VCCP=12V 1.2 A
BOOTSTRAP
IBOOT_QUIESCENT (HB - HS) quiescent current HB - HS = 12 V 60 70 µA
IBOOT_LEAK HB to GND leakage current VHB = 600 V 0.40 5.40 µA
tChargeBoot Length of charge boot state(1) 230 265 300 µs
SOFT START
SSRamp Soft Start Ramp time(1) 25 ms
OVP/OTP
Vclamp_otp Clamp Voltage at 0mA(1) At 0mA current flowing throug the clamp 1.35 1.5 1.65 V
Vclamp_otp Clmap Voltage at 1mA(1) At 1mA current flowing throug the clamp 2.9 3.5 4.1 V
IOTP Courent source on the BW/OTP pin 100 uA
VOVPpos Output voltage OVP - Threshold rising 3.5 V
VOTPNeg  OTP -  Threshold falling 0.8 V
OTPCompHys OTP comparator hysteresis 60 90 125 mV
OVPCompHys OVP comparator hysteresis 65 100 145 mV
OTPBlankingstartup OTP bkanking time at startup 50 ms
TOTPFault OTP Fuault detection time 330 us
TOVPFault OVP Fuault detection time(2) 40 us
ILLPrgm LL pin sourcing current for Burst mode transition threshold programming(2) 10 uA
tLLPrgm Burst mode transition threshold programming time(2) 2 ms
ADAPTIVE DEADTIME
dVHS/dt Detectable slew rate (falling slope) (2) 0.1 200 V/ns
FAULT RECOVERY
tPauseTimeOut Paused timer (1) 1 s
THERMAL SHUTDOWN
TJ_r Thermal shutdown temperature (1) Temperature rising 130 140 °C
TJ_H Thermal shutdown hsyterisis (1) 20 °C
(1) Not tested in production. Ensured by characterization
(2) Not tested in production. Ensured by design