SGLS274I September   2008  – November 2023 UCC27423-Q1 , UCC27424-Q1 , UCC27425-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Dissipation Ratings
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stage
      2. 7.3.2 Output Stage
      3. 7.3.3 Enable
      4. 7.3.4 Parallel Outputs
      5. 7.3.5 Operational Waveforms and Circuit Layout
      6. 7.3.6 VDD
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Source and Sink Capabilities During Miller Plateau
        2. 8.2.2.2 Drive Current and Power Requirements
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The UCC2742x-Q1 family of devices are high-speed dual MOSFET drivers capable of delivering large peak currents into capacitive loads. Two standard logic options are offered: dual inverting and dual noninverting drivers. They are offered in the standard 8-pin SOIC (D) package. The thermally enhanced 8-pin PowerPAD Package MSOP package (DGN) drastically lowers the thermal resistance to improve long-term reliability.

Using a design that inherently minimizes shoot-through current, these drivers deliver 4-A current where it is needed most, at the Miller plateau region, during the MOSFET switching transition. A unique bipolar and MOSFET hybrid output stage in parallel also allows efficient current sourcing and sinking at low supply voltages.

The UCC2742x-Q1 provide enable (ENBL) functions to have better control of the operation of the driver applications. ENBA and ENBB are implemented on pins 1 and 8, which were previously left unused in the industry standard pinout. They are internally pulled up to VDD for active-high logic and can be left open for standard operation.

Device Information
PART NUMBER(1)PACKAGEBODY SIZE (NOM)
UCC2742x-Q1SOIC (8)4.90 mm × 3.91 mm
MSOP
With PowerPAD (8)		3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-18A0801F-6FA0-41EE-A666-00D9006EDF6D-low.gif Block Diagram