JAJSL87H january   2010  – april 2021 BQ24090 , BQ24091 , BQ24092 , BQ24093 , BQ24095

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. 概要 (続き)
  7. Device Options
  8. Pin Configuration and Functions
  9. Specifications
    1. 8.1 Absolute Maximum Ratings #GUID-9FC6FB05-10A6-4323-9A52-EE32AE4C5F67/SLUS9405873
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions #GUID-4D70561B-CB71-403D-B731-8EF5DEBEBDF9/SLUS9401392
    4. 8.4 Thermal Information
    5. 8.5 Dissipation Ratings #GUID-196940BE-C3C2-4CDF-A8A4-7C186292F803/SLUS9404025 #GUID-196940BE-C3C2-4CDF-A8A4-7C186292F803/SLUS9403553
    6. 8.6 Electrical Characteristics
    7. 8.7 Typical Characteristics
      1. 8.7.1 Power Up, Power Down, OVP, Disable and Enable Waveforms
      2. 8.7.2 Protection Circuits Waveforms
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Power Down or Undervoltage Lockout (UVLO)
      2. 9.3.2  UVLO
      3. 9.3.3  Power Up
      4. 9.3.4  Sleep Mode
      5. 9.3.5  New Charge Cycle
      6. 9.3.6  Overvoltage Protection (OVP) – Continuously Monitored
      7. 9.3.7  Power Good Indication ( PG)
      8. 9.3.8  CHG Pin Indication
      9. 9.3.9  CHG and PG LED Pullup Source
      10. 9.3.10 IN-DPM (VIN-DPM or IN–DPM)
      11. 9.3.11 OUT
      12. 9.3.12 ISET
      13. 9.3.13 PRE_TERM – Precharge and Termination Programmable Threshold
      14. 9.3.14 ISET2
      15. 9.3.15 TS
    4. 9.4 Device Functional Modes
      1. 9.4.1 Termination and Timer Disable Mode (TTDM) - TS Pin High
      2. 9.4.2 Timers
      3. 9.4.3 Termination
      4. 9.4.4 Battery Detect Routine
      5. 9.4.5 Refresh Threshold
      6. 9.4.6 Starting a Charge on a Full Battery
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Calculations
          1. 10.2.2.1.1 Program the Fast Charge Current, ISET:
          2. 10.2.2.1.2 Program the Termination Current Threshold, ITERM:
          3. 10.2.2.1.3 TS Function
          4. 10.2.2.1.4 CHG and PG
        2. 10.2.2.2 Selecting IN and OUT Pin Capacitors
      3. 10.2.3 Application Curves
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
      1. 12.3.1 Leakage Current Effects on Battery Capacity
  14. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 サード・パーティ製品に関する免責事項
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 用語集
  15.   Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
INPUT
UVLOUndervoltage lock-out exitVIN: 0 V → 4 V update based on sim/char3.153.33.45V
VHYS_UVLOHysteresis on VUVLO_RISE fallingVIN: 4 V→0 V,
VUVLO_FALL = VUVLO_RISE –VHYS-UVLO
175227280mV
VIN-DTInput power good detection threshold is VOUT + VIN-DT(Input power good if VIN > VOUT + VIN-DT);
VOUT = 3.6 V, VIN: 3.5 V → 4 V
3080145mV
VHYS-INDTHysteresis on VIN-DT fallingVOUT = 3.6 V, VIN: 4 V → 3.5 V31mV
tDGL(PG_PWR)Deglitch time on exiting sleep.Time measured from VIN: 0 V → 5 V 1-μs rise time to PG = low, VOUT = 3.6 V45μs
tDGL(PG_NO-PWR)Deglitch time on VHYS-INDT power down. Same as entering sleep.Time measured from VIN: 5 V → 3.2 V 1-μs fall time to PG = OC, VOUT = 3.6 V29ms
VOVPInput overvoltage protection thresholdVIN: 5 V → 7 V6.56.656.8V
tDGL(OVP-SET)Input overvoltage blanking timeVIN: 5 V → 7 V113μs
VHYS-OVPHysteresis on OVPVIN: 7 V → 5 V95mV
tDGL(OVP-REC)Deglitch time exiting OVPTime measured from VIN: 7 V → 5 V 1-μs fall-time to PG = LO30μs
VIN-DPMUSB/Adaptor low input voltage protection. Restricts lout at VIN-DPMFeature active in USB Mode; Limit input source current to 50 mA; VOUT = 3.5 V; RISET = 825 Ω4.344.44.46V
Feature active in Adaptor Mode; Limit input source current to 50 mA; VOUT = 3.5 V; RISET = 825 Ω4.244.34.36
IIN-USB-CLUSB input I-Limit 100 mAISET2 = Float; RISET = 825 Ω8592100mA
USB input I-Limit 500 mAISET2 = High; RISET = 825 Ω430462500
ISET SHORT CIRCUIT TEST
RISET_SHORTHighest resistor value considered a fault (short). Monitored for Iout>90 mARiset: 600 Ω → 250 Ω, IOUT latches off, cycle power to reset.280500
tDGL_SHORTDeglitch time transition from ISET short to Iout disableClear fault by cycling IN or TS/ BAT_EN1ms
IOUT_CLMaximum OUT current limit Regulation (Clamp)VIN = 5 V, VOUT = 3.6 V, VISET2 = Low, RISET:
600 Ω → 250 Ω, Iout latches off after tDGL-SHORT
1.051.4A
BATTERY SHORT PROTECTION
VOUT(SC)OUT pin short-circuit detection threshold/ precharge thresholdVOUT: 3 V → 0.5 V, no deglitch0.750.80.85V
VOUT(SC-HYS)OUT pin short hysteresisRecovery ≥ VOUT(SC) + VOUT(SC-HYS); rising, no deglitch77mV
IOUT(SC)Source current to OUT pin during short-circuit detection101520mA
QUIESCENT CURRENT
IOUT(PDWN)Battery current into OUT pinVIN = 0 V1μA
IOUT(DONE)OUT pin current, charging terminatedVIN = 6 V, VOUT > VOUT(REG)6
IIN(STDBY)Standby current into IN pinTS = LO, VIN ≤ 6 V125μA
ICCActive supply current, IN pinTS = open, VIN = 6 V, TTDM – no load on OUT pin, VOUT > VOUT(REG), IC enabled0.81.0mA
BATTERY CHARGER FAST-CHARGE
VOUT(REG)Battery regulation voltage (BQ24090/1/2/3)VIN = 5.5 V, IOUT = 25 mA, (VTS-45°C≤ VTS ≤ VTS-0°C)4.164.24.23V
Battery regulation voltage (BQ24095)VIN = 5.5 V, IOUT = 25 mA4.304.354.40
VO_HT(REG)Battery hot regulation Voltage, BQ24092/3VIN = 5.5 V, IOUT = 25 mA, VTS-60°C≤ VTS ≤ VTS-45°C4.024.064.1V
IOUT(RANGE)Programmed Output fast charge current rangeVOUT(REG) > VOUT > VLOWV; VIN = 5 V, ISET2=Lo,
RISET = 540 to 10.8 kΩ
101000mA
VDO(IN-OUT)Drop-Out, VIN – VOUTAdjust VIN down until IOUT = 0.5 A, VOUT = 4.15 V, RISET = 540, ISET2 = Lo (Adaptor Mode); TJ ≤ 100°C325520mV
IOUTOutput fast charge formulaVOUT(REG) > VOUT > VLOWV; VIN = 5 V, ISET2 = LoKISET/RISETA
KISETFast charge current factor for
BQ24090, 91, 92, 93
RISET = KISET /IOUT; 50 < IOUT < 1000 mA510540565AΩ
RISET = KISET /IOUT; 25 < IOUT < 50 mA480527580
RISET = KISET /IOUT; 10 < IOUT < 25 mA350520680
KISETFast charge current factor for
BQ24095
RISET = KISET /IOUT; 50 < IOUT < 1000 mA510560585AΩ
RISET = KISET /IOUT; 25 < IOUT < 50 mA480557596
RISET = KISET /IOUT; 10 < IOUT < 25 mA350555680
PRECHARGE – SET BY PRETERM PIN
VLOWVPre-charge to fast-charge transition threshold2.42.52.6V
tDGL1(LOWV)Deglitch time on pre-charge to fast-charge transition70μs
tDGL2(LOWV)Deglitch time on fast-charge to pre-charge transition32ms
IPRE-TERMRefer to the Termination Section
%PRECHGPre-charge current, default settingVOUT < VLOWV; RISET = 1080 Ω;
RPRE-TERM= High Z
182022%IOUT-CC
Pre-charge current formulaRPRE-TERM = KPRE-CHG (Ω/%) × %PRE-CHG (%)RPRE-TERM/KPRE-CHG%
KPRE-CHG% Pre-charge FactorVOUT < VLOWV, VIN = 5 V, RPRE-TERM = 2 k to 10 kΩ; RISET = 1080 Ω, RPRE-TERM = KPRE-CHG × %IFAST-CHG, where %IFAST-CHG is 20 to 100%90100110Ω/%
VOUT < VLOWV, VIN = 5 V, RPRE-TERM = 1 k to 2 kΩ; RISET = 1080 Ω, RPRE-TERM = KPRE-CHG × %IFAST-CHG, where %IFAST-CHG is 10% to 20%84100117Ω/%
TERMINATION – SET BY PRE-TERM PIN
%TERMTermination threshold current, default settingVOUT > VRCH; RISET = 1 k;
RPRE-TERM = High Z
91011%IOUT-CC
Termination current threshold FormulaRPRE-TERM = KTERM (Ω/%) × %TERM (%)RPRE-TERM/ KTERM
KTERM% Term factorVOUT > VRCH, VIN = 5 V, RPRE-TERM = 2 k to 10 kΩ; RISET = 750 Ω KTERM × %IFAST-CHG, where %IFAST-CHG is 10 to 50%182200216Ω/%
VOUT > VRCH, VIN = 5 V, RPRE-TERM = 1 k to 2 kΩ; RISET = 750 Ω KTERM × %Iset, where %Iset is 5 to 10%174199224
IPRE-TERMCurrent for programming the term. and pre-chg with resistor. ITerm-Start is the initial PRE-TERM current.RPRE-TERM = 2 k, VOUT = 4.15 V717581μA
%TERMTermination current formulaRTERM/ KTERM%
tDGL(TERM)Deglitch time, termination detected29ms
ITerm-StartElevated PRE-TERM current for, tTerm-Start, during start of charge to prevent recharge of full battery808592μA
tTerm-StartElevated termination threshold initially active for tTerm-Start1.25min
RECHARGE OR REFRESH
VRCHRecharge detection threshold – normal tempVIN = 5V, VTS = 0.5 V, VOUT: 4.25 V → VRCHVO(REG)-0.120VO(REG)-0.095VO(REG)-0.070V
Recharge detection threshold – hot tempVIN = 5 V, VTS = 0.2V, VOUT: 4.15 V → VRCHVO(REG)-0.130VO(REG)-0.105VO(REG)-0.080V
tDGL1(RCH)Deglitch time, recharge threshold detectedVIN = 5 V, VTS = 0.5 V, VOUT: 4.25 V → 3.5 V in 1μs; tDGL(RCH) is time to ISET ramp29ms
tDGL2(RCH)Deglitch time, recharge threshold detected in OUT-Detect ModeVIN = 5 V, VTS = 0.5V, VOUT = 3.5 V inserted; tDGL(RCH) is time to ISET ramp3.6ms
BATTERY DETECT ROUTINE
VREG-BDVOUT reduced regulation during battery detectVIN = 5 V, VTS = 0.5 V, battery absentVO(REG)-0.450VO(REG)-0.400VO(REG)-350V
IBD-SINKSink current during VREG-BD

6

10mA
tDGL(HI/LOW REG)Regulation time at VREG or VREG-BD25ms
VBD-HIHigh battery detection thresholdVIN = 5 V, VTS = 0.5 V, battery absentVO(REG) -0.150VO(REG)-0.100VO(REG)-0.050V
VBD-LOLow battery detection thresholdVIN = 5 V, VTS = 0.5 V, battery absentVREG-BD
+0.50
VREG-BD +0.1VREG-BD
+0.15
V
BATTERY CHARGING TIMERS AND FAULT TIMERS
tPRECHGPre-charge safety timer valueRestarts when entering pre-charge; always enabled when in pre-charge170019402250s
tMAXCHCharge safety timer valueClears fault or resets at UVLO, TS/ BAT_EN disable, OUT short, exiting LOWV and refresh340003880045000s
BATTERY-PACK NTC MONITOR (Note 1); TS pin: 10 k and 100 k NTC
INTC-10kNTC bias current, BQ24090/2/5VTS = 0.3 V485052μA
INTC-100kNTC bias current, BQ24091/3VTS = 0.3 V4.85.05.2μA
INTC-DIS-10k10k NTC bias current when Charging is disabled, BQ24090/2/5VTS = 0 V273034μA
INTC-DIS-100k100k NTC bias current when Charging is disabled, BQ24091/3VTS = 0 V4.45.05.8μA
INTC-FLDBK-10kINTC is reduced prior to entering TTDM to keep cold thermistor from entering TTDM, BQ24090/2/5VTS: Set to 1.525 V456.5μA
INTC-FLDBK-100kINTC is reduced prior to entering TTDM to keep cold thermistor from entering TTDM, BQ24091/3VTS: Set to 1.525 V1.11.51.9μA
VTTDM(TS)Termination and Timer Disable Mode Threshold – enterVTS: 0.5 V → 1.7 V; timer held in Reset155016001650mV
VHYS-TTDM(TS)Hysteresis exiting TTDMVTS: 1.7 V → 0.5 V; timer enabled100mV
VCLAMP(TS)TS maximum voltage clampVTS = Open (float)180019502000mV
tDGL(TTDM)Deglitch exit TTDM between states57ms
Deglitch enter TTDM between states8μs
VTS_I-FLDBKTS voltage where INTC is reduce to keep thermistor from entering TTDMINTC adjustment (90 to 10%; 45 to 6.6 μS) takes place near this spec threshold. VTS: 1.425 V → 1.525 V1475mV
CTSOptional capacitance – ESD0.22μF
VTS-0°CLow temperature CHG pendingLow temp charging to pending;
VTS: 1.0 V → 1.5 V
120512301255mV
VHYS-0°CHysteresis at 0°CCharge pending to low temp charging;
VTS: 1.5 V → 1 V
86mV
VTS-10°CLow temperature, half charge, BQ24092/3Normal charging to low temp charging;
VTS: 0.5 V → 1 V
765790815mV
VHYS-10°CHysteresis at 10°C, BQ24092/3Low temp charging to normal CHG;
VTS: 1.0 V → 0.5 V
35mV
VTS-45°CHigh temperature at 4.1VNormal charging to high temp CHG;
VTS: 0.5 V → 0.2 V
263278293mV
VHYS-45°CHysteresis at 45°CHigh temp charging to normal CHG;
VTS: 0.2 V → 0.5 V
10.7mV
VTS-60°CHigh temperature disable, BQ24092/3High temp charge to pending;
VTS: 0.2 V → 0.1 V
170178186mV
VHYS-60°CHysteresis at 60°C, BQ24092/3Charge pending to high temp CHG;
VTS: 0.1 V → 0.2 V
11.5mV
tDGL(TS_10C)Deglitch for TS thresholds: 10C, BQ24092/3Normal to cold operation; VTS: 0.6 V → 1 V50ms
Cold to normal operation; VTS: 1 V → 0.6 V12
tDGL(TS)Deglitch for TS thresholds: 0/45/60C.Battery charging30ms
VTS-EN-10kCharge Enable Threshold, (10k NTC)VTS: 0 V → 0.175 V808896mV
VTS-DIS_HYS-10kHYS below VTS-EN-10k to Disable, (10k NTC)VTS: 0.125 V → 0 V12mV
VTS-EN-100kCharge Enable Threshold, BQ24090/2VTS: 0 V → 0.175 V140150160mV
VTS-DIS_HYS-100kHYS below VTS-EN-100k to Disable, BQ24091/3VTS: 0.125 V → 0 V50mV
THERMAL REGULATION
TJ(REG)Temperature regulation limit125°C
TJ(OFF)Thermal shutdown temperature155°C
TJ(OFF-HYS)Thermal shutdown hysteresis20°C
LOGIC LEVELS ON ISET2
VILLogic LOW input voltageSink 8 μA0.4V
VIHLogic HIGH input voltageSource 8 μA1.4V
IILSink current required for LOVISET2= 0.4 V29μA
IIHSource current required for HIVISET2= 1.4 V1.1

9.5

μA
VFLTISET2 Float voltage5759001225mV
LOGIC LEVELS ON CHG AND PG
VOLOutput LOW voltageISINK = 5 mA0.4V
ILEAKLeakage current into ICV CHG = 5 V, V PG = 5 V1μA