JAJSGQ2F August   2013  – March 2019

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      充電器の効率
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Maximum Power Point Tracking
      2. 7.3.2 Battery Undervoltage Protection
      3. 7.3.3 Battery Overvoltage Protection
      4. 7.3.4 Battery Voltage in Operating Range (VBAT_OK Output)
      5. 7.3.5 Push-Pull Multiplexer Drivers
      6. 7.3.6 Nano-Power Management and Efficiency
    4. 7.4 Device Functional Modes
      1. 7.4.1 Main Boost Charger Disabled (Ship Mode) - (VSTOR > VSTOR_CHGEN and EN = HIGH)
      2. 7.4.2 Cold-Start Operation (VSTOR < VSTOR_CHGEN, VIN_DC > VIN(CS) and PIN > PIN(CS))
      3. 7.4.3 Main Boost Charger Enabled (VSTOR > VSTOR_CHGEN, VIN_DC > VIN(DC) and EN = LOW )
      4. 7.4.4 Thermal Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Energy Harvester Selection
      2. 8.1.2 Storage Element Selection
      3. 8.1.3 Inductor Selection
      4. 8.1.4 Capacitor Selection
        1. 8.1.4.1 VREF_SAMP Capacitance
        2. 8.1.4.2 VIN_DC Capacitance
        3. 8.1.4.3 VSTOR Capacitance
        4. 8.1.4.4 Additional Capacitance on VSTOR or VBAT_SEC
    2. 8.2 Typical Applications
      1. 8.2.1 Solar Application Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Performance Plots
      2. 8.2.2 TEG Application Circuit
      3. 8.2.3 Design Requirements
        1. 8.2.3.1 Detailed Design Procedure
        2. 8.2.3.2 Application Performance Plots
      4. 8.2.4 Piezoelectric Application Circuit
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 Zipファイル
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.1 Maximum Power Point Tracking

Maximum power point tracking (MPPT) is implemented in order to maximize the power extracted from an energy harvester source. The boost converter indirectly modulates the input impedance of the main boost charger by regulating the charger's input voltage, as sensed by the VIN_DC pin, to the sampled reference voltage stored on the VREF_SAMP pin. The MPPT circuit obtains a new reference voltage every 16 s (typical) by periodically disabling the charger for 256 ms (typical) and sampling a fraction of the harvester's open-circuit voltage (VOC). For solar harvesters, the maximum power point is typically 70%-80% of VOC and for thermoelectric harvesters, the MPPT is typically 50%. Tying VOC_SAMP to VSTOR internally sets the MPPT regulation point to 80% of VOC. Tying VOC_SAMP to GND internally sets the MPPT regulation point to 50% of VOC. If input source does not have either 80% or 50% of VOC as its MPP point, the exact ratio for MPPT can be optimized to meet the needs of the input source being used by connecting external resistors ROC1 and ROC2 between VIN_DC and GND with mid-point at VOC_SAMP.

The reference voltage is set by Equation 1:

Equation 1. bq25505 EQ1_Vref_lusah0.gif