DLPS031C December 2013 – August 2015 DLPC6401
PRODUCTION DATA.
The DLPC6401 device contains a test point output port, TSTPT_(7:0), which provides selected system calibration support as well as ASIC debug support. These test points are inputs while reset is applied and switch to outputs when reset is released. The state of these signals is sampled upon the release of system reset and the captured value configures the test mode until the next time reset is applied. Each test point includes an internal pulldown resistor and thus external pullups are used to modify the default test configuration. The default configuration (x00) corresponds to the TSTPT(7:0) outputs being driven low for reduce switching activity during normal operation. For maximum flexibility, TI recommends an option to jumper to an external pullup for TSTPT(0). Note that adding a pullup to TSTPT(7:1) may have adverse affects for normal operation and TI does not recommend it. Note that these external pullups are sampled only after a 0-to-1 transition on POSENSE and thus changing their configuration after reset has been released does not have any affect until the next time reset is asserted and released. Table 6 defines the test mode selection for two programmable scenarios defined by TSTPT_(0):
TSTPT(3:0) CAPTURE VALUE | NO SWITCHING ACTIVITY | ARM AHB DEBUG SIGNAL SET |
---|---|---|
x0 | x1 | |
TSTPT(0) | 0 | ARM9 HREADY |
TSTPT(1) | 0 | HSEL for all external program memory |
TSTPT(2) | 0 | ARM9 HTRANS(1) |
TSTPT(3) | 0 | PFC HREADY OUT (ARM9 R/W) |
TSTPT(4) | 0 | PFC EMI(2) request (ARM9 R/W) |
TSTPT(5) | 0 | PFC EMI(2) request accept (ARM9 R/W) |
TSTPT(6) | 0 | PFC EMI(2) access done (ARM9 R/W) |
TSTPT(7) | 0 | ARM9 Gate_The_Clk |