DLPS031C December 2013 – August 2015 DLPC6401
PRODUCTION DATA.
Following system power-up, the DLPC6401 device performs a power-up initialization routine that defaults the ASIC to its normal power mode, in which ARM9-related clocks are enabled at their full rate and associated resets are released. Most other clocks default to disabled state with associated resets asserted until released by the processor. These same defaults are also applied as part of all system reset events (watch dog timer timeout, and so on) that occur without removing or cycling power.
Following power-up or system reset initialization, the ARM9 boots from an external flash memory after which it enables the rest of the ASIC clocks. When system initialization is complete, application software determines if and when to enter low-power mode.