JAJSPA6 August   2020 DS90LV028A-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD and Latch-Up Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Performance Curves
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Decoupling Recommendations
        2. 9.2.2.2 Termination
        3. 9.2.2.3 Input Failsafe Biasing
        4. 9.2.2.4 Probing LVDS Transmission Lines
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Differential Traces
      2. 11.1.2 PC Board Considerations
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Support Resources
    2. 12.2 Trademarks
    3. 12.3 静電気放電に関する注意事項
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Feature Description

The DS90LV028A-Q1 differential line receiver is capable of detecting signals as low as 100 mV, over a common-mode range of 0.5 + (VID/2) V to 2.1 - (VID/2) V. This is related to the driver offset voltage which is typically +1.2V. The driven signal is centered around this voltage and may shift ±0.5V around this center point. The ±0.5V shifting may be the result of a ground potential difference between the driver's ground reference and the receiver's ground reference, the common-mode effects of coupled noise, or a combination of the two. The AC parameters of both receiver input pins are optimized for a recommended operating input voltage range of +0.5V to +2.1V (measured from each pin to ground). The device will operate for receiver input voltages up to VCC, but exceeding VCC will turn on the ESD protection circuitry which will clamp the bus voltages.