SNVS428H January   2006  – October 2015 LM5035

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High-Voltage Start-Up Regulator
      2. 7.3.2  Line Undervoltage Detector
      3. 7.3.3  Line Overvoltage, Load Overvoltage, Remote Thermal Protection
      4. 7.3.4  Reference
      5. 7.3.5  Cycle-by-Cycle Current Limit
      6. 7.3.6  Overload Protection Timer
      7. 7.3.7  Soft-Start
      8. 7.3.8  Soft-Stop
      9. 7.3.9  PWM Comparator
      10. 7.3.10 Feedforward Ramp and Volt-Second Clamp
      11. 7.3.11 Oscillator, Sync Capability
      12. 7.3.12 Gate-Driver Outputs (HO and LO)
      13. 7.3.13 Synchronous Rectifier Control Outputs (SR1 and SR2)
      14. 7.3.14 Thermal Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VIN
        2. 8.2.2.2 For Applications >100 V
        3. 8.2.2.3 Current Sense
        4. 8.2.2.4 HO, HB, HS, and LO
        5. 8.2.2.5 Programmable Delay (DLY)
        6. 8.2.2.6 UVLO and OVP Voltage Divider Selection for R1, R2, and R3
        7. 8.2.2.7 Fault Protection
        8. 8.2.2.8 HICCUP Mode Current-Limit Restart (RES)
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
VIN to GND –0.3 105 V
HS to GND –1 105 V
HB to GND –0.3 118 V
HB to HS –0.3 18 V
VCC to GND –0.3 16 V
CS, RT, DLY to GND –0.3 5.5 V
COMP input current 10 mA
All other inputs to GND –0.3 7 V
Junction temperature 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office or Distributors for availability and specifications.

6.2 ESD Ratings

VALUE UNIT
V(ESD)(3) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. 2 kV for all pins except HB, HO, and HS, which are rated at 1.5 kV.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) (1)
MIN NOM MAX UNIT
VIN voltage 13 105 V
External voltage applied to VCC 8 15 V
Operating Junction Temperature –40 125 °C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For ensured specifications and test conditions, see the Electrical Characteristics.

6.4 Thermal Information

THERMAL METRIC(1) LM5035 UNIT
PWP (HTSSOP) NHZ (WQFN)
20 PINS 24 PINS
RθJA Junction-to-ambient thermal resistance 36.2 30 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 20.6 20.1 °C/W
RθJB Junction-to-board thermal resistance 17.4 5.5 °C/W
ψJT Junction-to-top characterization parameter 0.5 0.2 °C/W
ψJB Junction-to-board characterization parameter 17.2 5.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.6 1.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

VVIN = 48 V, VVCC = 10 V externally applied, RRT = 15.0 kΩ, RDLY = 27.4 kΩ, VUVLO = 3 V, VOVP = 0 V unless otherwise stated(1)(2).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
START-UP REGULATOR (VCC PIN)
VVCC VCC voltage IVCC = 10 mA TJ = 25°C 7.6 V
TJ = –40°C to 125°C 7.3 7.9
IVCC(LIM) VCC current limit VVCC = 7 V TJ = 25°C 25 mA
TJ = –40°C to 125°C 20
VVCCUV VCC undervoltage threshold (VCC increasing) VIN = VCC, ΔVVCC from the regulation set point TJ = 25°C 0.1 V
TJ = –40°C to 125°C 0.2
VCC decreasing VCC – PGND TJ = 25°C 6.2 V
TJ = –40°C to 125°C 5.5 6.9
IVIN Start-up regulator current VIN = 90 V, UVLO = 0 V TJ = 25°C 30 µA
TJ = –40°C to 125°C 70
Supply current into VCC from external source Outputs and COMP open, VVCC = 10 V, outputs switching TJ = 25°C 4 mA
TJ = –40°C to 125°C 6
VOLTAGE REFERENCE REGULATOR (REF PIN)
VREF REF voltage IREF = 0 mA TJ = 25°C 5 V
TJ = –40°C to 125°C 4.85 5.15
REF voltage regulation IREF = 0 to 10 mA TJ = 25°C 25 mV
TJ = –40°C to 125°C 50
REF current limit REF = 4.5 V TJ = 25°C 20 mA
TJ = –40°C to 125°C 15
UVLO AND SHUTDOWN (UVLO PIN)
VUVLO Undervoltage threshold TJ = 25°C 1.25 V
TJ = –40°C to 125°C 1.212 1.288
IUVLO Hysteresis current UVLO pin sinking TJ = 25°C 23 µA
TJ = –40°C to 125°C 19 27
Undervoltage shutdown threshold UVLO voltage falling, TJ = 25°C 0.3 V
Undervoltage standby enable threshold UVLO voltage rising, TJ = 25°C 0.4 V
OVERVOLTAGE PROTECTION (OVP PIN)
VOVP Overvoltage threshold TJ = 25°C 1.25 V
TJ = –40°C to 125°C 1.212 1.288
IOVP Hysteresis current OVP pin sourcing TJ = 25°C 23 µA
TJ = –40°C to 125°C 19 27
CURRENT SENSE INPUT (CS PIN)
VCS Current limit threshold TJ = 25°C 0.25 V
TJ = –40°C to 125°C 0.228 0.272
CS delay to output TJ = 25°C, CS from zero to 1 V, Time for HO and LO to fall to 90% of VCC Output load = 0 pF 80 ns
Leading edge blanking time at CS TJ = 25°C 50 ns
CS sink impedance (clocked) Internal FET sink impedance TJ = 25°C 32 Ω
TJ = –40°C to 125°C 60
CURRENT LIMIT RESTART (RES PIN)
VRES RES threshold TJ = 25°C 2.5 V
TJ = –40°C to 125°C 2.4 2.6
Charge source current VRES = 1.5 V TJ = 25°C 22 µA
TJ = –40°C to 125°C 16 28
Discharge sink current VRES = 1 V TJ = 25°C 12 µA
TJ = –40°C to 125°C 8 16
SOFT-START (SS PIN)
ISS Charging current in normal operation VSS = 0 TJ = 25°C 55 µA
TJ = –40°C to 125°C 40 70
Charging current during a hiccup mode restart VSS = 0 TJ = 25°C 1.2 µA
TJ = –40°C to 125°C 0.6 1.8
Soft-stop current sink VSS = 2.5 V TJ = 25°C 55 µA
TJ = –40°C to 125°C 40 70
OSCILLATOR (RT PIN)
FSW1 Frequency 1 (at HO, half oscillator frequency) RRT = 15 kΩ, TJ = 25°C 185 200 215 kHz
TJ = –40°C to 125°C 180 220
FSW2 Frequency 2 (at HO, half oscillator frequency) RRT = 5.49 kΩ TJ = 25°C 500 kHz
TJ = –40°C to 125°C 430 570
DC level TJ = 25°C 2 V
Input Sync threshold TJ = 25°C 3 V
TJ = –40°C to 125°C 2.5 3.4
PWM CONTROLLER (COMP PIN)
Delay to output TJ = 25°C 80 ns
VPWM-OS SS to RAMP offset TJ = 25°C 1 V
TJ = –40°C to 125°C 0.7 1.2
Minimum duty cycle SS = 0 V, TJ = 25°C 0%
Small signal impedance ICOMP = 600 µA, COMP current to PWM voltage,
TJ = 25°C		 5000 Ω
MAIN OUTPUT DRIVERS (HO and LO PINS)
Output high voltage IOUT = 50 mA, VHB – VHO, VVCC – VLO TJ = 25°C 0.25 V
TJ = –40°C to 125°C 0.5
Output low voltage IOUT = 100 mA TJ = 25°C 0.2 V
TJ = –40°C to 125°C 0.5
Rise time CLOAD = 1 nF, TJ = 25°C 15 ns
Fall time CLOAD = 1 nF, TJ = 25°C 13 ns
Dead time, HO to LO, LO to HO VDLY = VREF, ICOMP = 0 mA TJ = 25°C 70 ns
TJ = –40°C to 125°C 45 100
Peak source current VHO,LO = 0 V, VVCC = 10 V , TJ = 25°C 1.25 A
Peak sink current VHO,LO = 10 V, VVCC = 10 V, TJ = 25°C 2 A
VOLTAGE FEEDFORWARD (RAMP PIN)
RAMP comparator threshold COMP current = 0 TJ = 25°C 2.5 V
TJ = –40°C to 125°C 2.4 2.6
SYNCHRONOUS RECTIFIER DRIVERS (SR1, SR2)
Output high voltage IOUT = 10 mA, VVCC – VSR1, VVCC – VSR2 TJ = 25°C 0.1 V
TJ = –40°C to 125°C 0.25
Output low voltage IOUT = 20 mA (sink) TJ = 25°C 0.08 V
TJ = –40°C to 125°C 0.2
Rise time CLOAD = 1 nF, TJ = 25°C 40 ns
Fall time CLOAD = 1 nF, TJ = 25°C 20 ns
Peak source current VSR = 0, VVCC = 10 V, TJ = 25°C 0.5 A
Peak sink current VSR = VVCC, VVCC = 10 V, TJ = 25°C 0.5 A
T1 Dead time, SR1 falling to HO rising, SR2 falling to LO rising RDLY = 10 kΩ, TJ = 25°C 40 ns
RDLY = 27.4 kΩ TJ = 25°C 100
TJ = –40°C to 125°C 75 125
RDLY = 100 kΩ, TJ = 25°C 300
T2 Dead time, HO falling to SR1 rising, LO falling to SR2 rising RDLY = 10 kΩ, TJ = 25°C 20 ns
RDLY = 27.4 kΩ TJ = 25°C 45
TJ = –40°C to 125°C 30 65
RDLY = 100 kΩ, TJ = 25°C 140
THERMAL SHUTDOWN
TSD Shutdown temperature TJ = 25°C 165 °C
Hysteresis TJ = 25°C 20 °C
(1) All limits are ensured. All electrical characteristics having room temperature limits are tested during production with TA = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
(2) Typical specifications represent the most likely parametric norm at 25°C operation.

6.6 Typical Characteristics

LM5035 20177505.gif
Figure 1. VVCC and VREF vs VVIN
LM5035 20177507.gif
Figure 3. VREF vs IREF
LM5035 20177509.gif
Figure 5. Oscillator Frequency vs Temperature
LM5035 20177511.gif
Figure 7. Effective Comp Input Impedance
LM5035 20177513.gif
Figure 9. SR T1 Parameter vs Temperature
LM5035 20177506.gif
Figure 2. VVCC vs IVCC
LM5035 20177508.gif
Figure 4. Frequency vs RT
LM5035 20177510.gif
Figure 6. Soft-Start and Stop Current vs Temperature
LM5035 20177512.gif
Figure 8. RDLY vs Dead Time
LM5035 20177514.gif
Figure 10. SR T2 Parameter vs Temperature