JAJSQP5 july   2023 LMG2100R044

ADVANCE INFORMATION  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 ESD Ratings
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  8. Typical Characteristics
  9. Parameter Measurement Information
    1. 8.1 Propagation Delay and Mismatch Measurement
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Control Inputs
      2. 9.3.2 Start-up and UVLO
      3. 9.3.3 Bootstrap Supply Voltage Clamping
      4. 9.3.4 Level Shift
    4. 9.4 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 VCC Bypass Capacitor
        2. 10.2.2.2 Bootstrap Capacitor
        3. 10.2.2.3 Power Dissipation
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Examples
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
  13.   Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
  • RAR|16
サーマルパッド・メカニカル・データ
発注情報

Device Functional Modes

The LMG2100R044 operates in normal mode and UVLO mode. See Section 9.3.2 for information on UVLO operation mode. In the normal mode, the output state is dependent on the states of the HI and LI pins. Table 9-3 lists the output states for different input pin combinations. Note that when both HI and LI are asserted, both GaN FETs in the power stage are turned on. Careful consideration must be applied to the control inputs in order to avoid this state, as it will result in a shoot-through condition, which can permanently damage the device.

Table 9-3 Truth Table
HILIHIGH-SIDE GaN FETLOW-SIDE GaN FETSW
LLOFFOFFHi-Z
LHOFFONPGND
HLONOFFVIN
HHONON- - -