JAJSS15 November 2023 LMK3H0102
ADVANCE INFORMATION
The digital state machine of the LMK3H0102 has a clock that originates from FOD0. This clock must run as close to 45 MHz as is allowed by the frequency of FOD0. The divider value used to set this clock is equal to the value stored in R0[9:3]. As an example, if the frequency of FOD0 is 200 MHz, then R0[9:3] must be set to 0x04, as 200 MHz divided by 4 is 50 MHz.