JAJSF12A March   2018  – January 2024 LMR14010A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Fixed Frequency PWM Control
      2. 6.3.2 Bootstrap Voltage (CB)
      3. 6.3.3 Setting the Output Voltage
      4. 6.3.4 Enable ( SHDN ) and VIN Undervoltage Lockout
      5. 6.3.5 Current Limit
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Continuous Conduction Mode
      2. 6.4.2 Eco-mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Step-By-Step Design Procedure
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Output Inductor Selection
        3. 7.2.2.3 Output Capacitor Selection
        4. 7.2.2.4 Schottky Diode Selection
        5. 7.2.2.5 Input Capacitor Selection
        6. 7.2.2.6 Bootstrap Capacitor Selection
      3. 7.2.3 Application Performance Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.4 Enable ( SHDN ) and VIN Undervoltage Lockout

The LMR14010A SHDN pin is a high-voltage tolerant input with an internal pullup circuit. The device can be enabled even if the SHDN pin is floating. The regulator can also be turned on using 1.25-V or higher logic signals. If the use of a higher voltage is desired due to system or other constraints it can be used. TI recommends a 100-kΩ or larger resistor between the applied voltage and the SHDN pin to protect the device. When SHDN is pulled down to 0 V, the chip is turned off and enters the lowest shutdown current mode. In shutdown mode the supply current will be decreased to approximately 1 µA. If the shutdown function is not to be used, the SHDN pin can be tied to VIN. The maximum voltage to the SHDN pin must not exceed 40 V.

The LMR14010A has an internal UVLO circuit to shutdown the output if the input voltage falls below an internally fixed UVLO threshold level. This makes sure that the regulator is not latched into an unknown state during low input voltage conditions. The regulator powers up when the input voltage exceeds the UVLO voltage level. If there is a requirement for a higher UVLO voltage, the SHDN can be used to adjust the input voltage UVLO by using external resistors.