JAJSHZ4A September   2019  – February 2020 LMR36520

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      効率と出力電流との関係 VOUT = 5V、400kHz
      2.      概略回路図
  4. 4 改訂履歴
  5. 5 Description
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Switching Characteristics
    8. 8.8 System Characteristics
    9. 8.9 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power-Good Flag Output
      2. 9.3.2 Enable and Start-up
      3. 9.3.3 Current Limit and Short Circuit
      4. 9.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Auto Mode
      2. 9.4.2 Forced PWM Operation
      3. 9.4.3 Dropout
      4. 9.4.4 Minimum Switch On-Time
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design 1: Low Power 24-V, 2-A Buck Converter
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1  Choosing the Switching Frequency
          2. 10.2.1.2.2  Setting the Output Voltage
          3. 10.2.1.2.3  Inductor Selection
          4. 10.2.1.2.4  Output Capacitor Selection
          5. 10.2.1.2.5  Input Capacitor Selection
          6. 10.2.1.2.6  CBOOT
          7. 10.2.1.2.7  VCC
          8. 10.2.1.2.8  CFF Selection
          9. 10.2.1.2.9  External UVLO
          10. 10.2.1.2.10 Maximum Ambient Temperature
      2. 10.2.2 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground and Thermal Considerations
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 開発サポート
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 サポート・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Pin Configuration and Functions

DDA Package
8-Pin HSOIC
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
PGND 1 G Power and analog ground terminal. Connect to bypass capacitor with short, wide traces. Ground reference for internal references and logic. All electrical parameters are measured with respect to this pin.
VIN 2 P Input supply to regulator. Connect a high-quality bypass capacitor or capacitors directly to this pin and PGND.
EN 3 A Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN; Do not float.
PG 4 A Open-drain power-good flag output. Connect to suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. Flag pulls low when EN = Low. Can be left open when not used.
FB 5 A Feedback input to regulator. Connect to tap point of feedback voltage divider. Do not float. Do not ground.
VCC 6 P Internal 5-V LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for power-good flag. Connect a high-quality 1-µF capacitor from this pin to PGND.
BOOT 7 P Bootstrap supply voltage for internal high-side driver. Connect a high-quality 100-nF capacitor from this pin to the SW pin.
SW 8 P Regulator switch node. Connect to a power inductor.
PAD THERMAL PAD Thermal Major heat dissipation path of the device. A direct thermal connection to a ground plane is required. The PAD is not meant as an electrical interconnect. Electrical characteristics are not ensured.
A = Analog, P = Power, G = Ground