SBOS206F January   2001  – October 2023 OPA561

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 Adjustable Current Limit
        1. 6.2.1.1 Current Limit Accuracy
        2. 6.2.1.2 Setting the Current Limit
      2. 6.2.2 Enable-Status (E/S) Pin
        1. 6.2.2.1 Output Disable
        2. 6.2.2.2 Maintaining Microcontroller Compatibility
      3. 6.2.3 Overcurrent Flag
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Output Stage Compensation
      2. 7.1.2 Output Protection
      3. 7.1.3 Thermal Protection
      4. 7.1.4 Power Dissipation
      5. 7.1.5 Heat-Sink Area
      6. 7.1.6 Amplifier Mounting
        1. 7.1.6.1 What is the PowerPAD™ Integrated Circuit Package?
        2. 7.1.6.2 PowerPAD™ Integrated Circuit Package Assembly Process
    2. 7.2 Typical Application
      1. 7.2.1 Laser Diode Driver
      2. 7.2.2 Programmable Power Supply
      3. 7.2.3 Power-Line Communication Modem
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • PWP|20
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

at TCASE = 25°C, VS = 15 V, load connected to V/2, and E/S enabled (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE, VS = 12 V
VOS Input offset voltage VCM = 0 V –3 ±20 mV
dVOS/dT Input offset voltage vs temperature TA = 0°C to 125°C ±50 µV/°C
PSRR Input Offset Voltage vs Power Supply VCM = 0 V, VS = 7 V to 16 V 25 150 µV/V
INPUT BIAS CURRENT(1)
IB Input bias current VCM = 0 V 10 100 pA
IOS Input offset current VCM = 0 V 10 100 pA
NOISE
en Input voltage noise density f = 1 kHz 83 nV/√Hz
f = 10 kHz 32
f = 100 kHz 14
in Current noise f = 1 kHz 4 fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage Linear operation (V–) – 0.1 (V+) – 3 V
CMRR Common-mode rejection ratio VS = 15 V, VCM = (V−) − 0.1 V to (V+) − 3 V 70 80 dB
INPUT IMPEDANCE
Differential 1.8 × 1011 || 10 Ω || pF
Common-mode 1.8 × 1011 || 18.5 Ω || pF
OPEN-LOOP GAIN
AOL Open-loop voltage Gain VO = 10 VPP, RL = 5 Ω 80 100 dB
FREQUENCY RESPONSE
GBW Gain-bandwidth product RL = 5 Ω 17 MHz
SR Slew Rate G = 1, 10‑V step, RL = 5 Ω 50 V/μs
Full-power bandwidth G = +2, VOUT = 10 Vp-p 1 MHz
Settling time: ±0.1% G = −1, 10‑V step 1 μs
THD+N Total harmonic distortion + noise f = 1 kHz, RL = 5 Ω, G = +2, VO= 10 VPP 0.02 %
f = 1 MHz 3
OUTPUT
Voltage output Positive, IO = 0.5 A (V+) – 1 (V+) – 0.7 V
Negative, IO = –0.5 A (V–) + 1 (V–) + 0.7
Positive, IO = 1 A (V+) – 1.5 (V+) – 1.2
Negative, IO = –1 A (V–) + 1.5 (V–) + 1.2
Maximum continuous current output, dc 1.2 A
ZO Output impedance G = +2, f = 100 kHz 0.05
Output current limit Range ±0.2 to ±1.2 A
Current limit tolerance(2) RCL = 2 kΩ (ILIM = ±1 A) ±50 mA
Asymmetry Comparing positive and negative limits 10 %
Current limit overshoot(3) V = 5‑V pulse (200 ns tr), G = +2 50 %
Output disabled Output resistance 10 MΩ
Output capacitance 140 pF
OUTPUT ENABLE/STATUS AND FLAG PINS
Shutdown input mode, VE/S high (output enabled)(4) E/S pin open or forced high (V−) + 2 (V−) + 5 V
Shutdown input mode, VE/S low (output disabled) E/S pin forced low (V−) – 0.4 (V–) + 0.8 V
Shutdown input mode, IE/S high (output enabled) E/S pin indicates high 20 μA
Shutdown input mode, IE/S low (output disabled) E/S pin indicates low 0.1 μA
Output disable time 50 ns
Output enable time 3 µs
Thermal shutdown status Normal operation, sourcing 20 µA (V–) + 2 V
Thermally shutdown (V–) + 0.8
Current limit status Normal operation, sourcing 20 µA (V–) + 0.8 V
Current limit flagged (V–) + 2
Junction temperature at shutdown 160 °C
Reset temperature from shutdown 140 °C
POWER SUPPLY
IQ Quiescent current ILIM connected to V−, IQ = 0 50 60 mA
Quiescent current vs temperature TA = 0°C to 125°C 60 70 mA
Quiescent current in shutdown mode ILIM connected to V− 250 μA
High-speed test at TJ = +25°C.
See text for more information on current limit accuracy.
Transient load transition time must be ≥ 200 ns.
402‑kΩ pullup resistor to V+ can be used to permanently enable the OPA561.